Simulation of NE5532 fails in KiCAD 9.03

[marcdraco]

This is similar (but not a duplicate) of this:

NE5532 OpAmp NGspice Simulation Issue

I’ve got a simple OpAmp DC Amplifier circuit using the NE5532 OpAmp … created for testing purposes. But I can’t get it to work. I got the model from jeastham.blogspot.com HERE I set up the NE5532 spice model like this. Library: NE5532.mod Model: NE5532 Type: Subcircuit Alternate Node Sequence: 3 2 8 4 1 You can check out the project by looking at the attached zip file. NE5532 Test Ckt.zip (7.8 KB) The Schematic is below, followed by James Eastham’s Model Definition Thanks for any help …

The model definition is:

**** NE5532 Source: Texas Instruments NE5534
* C2 added to simulate compensated frequency response (Uwe Beis)
**** NE5532 Source: Texas Instruments NE5534
* C2 added to simulate compensated frequency response (Uwe Beis)

* NE5532 OPERATIONAL AMPLIFIER "MACROMODEL" SUBCIRCUIT
* CREATED USING NE5534 model from Texas InstrumentsAT 12:41
* (REV N/A)      SUPPLY VOLTAGE: +/-15V
* CONNECTIONS:   NON-INVERTING INPUT
*                | INVERTING INPUT
*                | | POSITIVE POWER SUPPLY
*                | | | NEGATIVE POWER SUPPLY
*                | | | | OUTPUT
*                | | | | |
.SUBCKT NE5532   1 2 3 4 5
*
C1   11 12 7.703E-12
C2    6  7 23.500E-12
DC    5 53 DX
DE   54  5 DX
DLP  90 91 DX
DLN  92 90 DX
DP    4  3 DX
EGND 99  0 POLY(2) (3,0) (4,0) 0 .5 .5
FB    7 99 POLY(5) VB VC VE VLP VLN 0 2.893E6 -3E6 3E6 3E6 -3E6
GA    6  0 11 12 1.382E-3
GCM   0  6 10 99 13.82E-9
IEE  10  4 DC 133.0E-6
HLIM 90  0 VLIM 1K
Q1   11  2 13 QX
Q2   12  1 14 QX
R2    6  9 100.0E3
RC1   3 11 723.3
RC2   3 12 723.3
RE1  13 10 329
RE2  14 10 329
REE  10 99 1.504E6
RO1   8  5 50
RO2   7 99 25
RP    3  4 7.757E3
VB    9  0 DC 0
VC    3 53 DC 2.700
VE   54  4 DC 2.700
VLIM  7  8 DC 0
VLP  91  0 DC 38
VLN   0 92 DC 38
.MODEL DX D(IS=800.0E-18)
.MODEL QX NPN(IS=800.0E-18 BF=132)
.ENDS
* NE5532 OPERATIONAL AMPLIFIER "MACROMODEL" SUBCIRCUIT
* CREATED USING NE5534 model from Texas InstrumentsAT 12:41
* (REV N/A)      SUPPLY VOLTAGE: +/-15V
* CONNECTIONS:   NON-INVERTING INPUT
*                | INVERTING INPUT
*                | | POSITIVE POWER SUPPLY
*                | | | NEGATIVE POWER SUPPLY
*                | | | | OUTPUT
*                | | | | |
.SUBCKT NE5532   1 2 3 4 5
*
C1   11 12 7.703E-12
C2    6  7 23.500E-12
DC    5 53 DX
DE   54  5 DX
DLP  90 91 DX
DLN  92 90 DX
DP    4  3 DX
EGND 99  0 POLY(2) (3,0) (4,0) 0 .5 .5
FB    7 99 POLY(5) VB VC VE VLP VLN 0 2.893E6 -3E6 3E6 3E6 -3E6
GA    6  0 11 12 1.382E-3
GCM   0  6 10 99 13.82E-9
IEE  10  4 DC 133.0E-6
HLIM 90  0 VLIM 1K
Q1   11  2 13 QX
Q2   12  1 14 QX
R2    6  9 100.0E3
RC1   3 11 723.3
RC2   3 12 723.3
RE1  13 10 329
RE2  14 10 329
REE  10 99 1.504E6
RO1   8  5 50
RO2   7 99 25
RP    3  4 7.757E3
VB    9  0 DC 0
VC    3 53 DC 2.700
VE   54  4 DC 2.700
VLIM  7  8 DC 0
VLP  91  0 DC 38
VLN   0 92 DC 38
.MODEL DX D(IS=800.0E-18)
.MODEL QX NPN(IS=800.0E-18 BF=132)
.ENDS

I note that this model should work with KiCAD but I’m getting the following error:

Note: Codel model file loading path is C:\users\crossover\Desktop\Test\
Background thread stopped with timeout = 0
Note: Compatibility modes selected: ps lt a
Error: Mismatch of .subckt ... .ends statements!
in file "Y:/Documents/5532.subckt
This will cause subsequent errors.
Check .ends in line number 1
Error: ngspice.dll cannot recover and awaits to be reset or detached

I’ve used this model previously and I know that @holger identified an issue with (I think the user) back in KiCAD 7 where they had gone a bit wrong with the pinning which looks right to me - but perhaps I’ve missed something “obvious”.

I ran the simulation with an internal Op Amp and it works fine but as soon as I swap it out for a “real” one (so to speak) it all goes to pot. With regards to my earlier post (due to KiCAD “failing” in FlatHub) I’ve tried this in the Windows version under Crossover to verify that the simulation is set up correctly and the only change is the actual model.

[holger]

Your model file seems to be corrupt. It does contain the same model twice (from .subckt … to .ends).
At least your copy to this thread is defect, the model in the zip file is o.k…

Your pin assignment between symbol and model is wrong.

This is what you need:

1	5
2	2
3	1
4 (VCC-)	4
8 (VCC+)	3

[marcdraco]

Blockquote
Your model file seems to be corrupt. It does contain the same model twice (from .subckt … to .ends).
At least your copy to this thread is defect, the model in the zip file is o.k… Your pin assignment between symbol and model is wrong.
This is what you need:
|1|5|
| — | — |
|2|2|
|3|1|
|4 (VCC-)|4|
|8 (VCC+)|3|

I understand the pinning of an 8-pin DIL but I’m missing something here in NGSpice. I’ve used that model this afternoon without issue in (can I say this?) LTSpice. LT Is a massive pain in the bum when creating models as I’m sure you’re away, but it does create the correct pinning which is the same I thought I’d used in KiCAD.

LT creates this mess:

Which has to be re-drawn into something a bit more like a proper amp. LT doesn’t even have a triangle primitive (yet).

I don’t fully understand from your explanation what NG is expecting. I’m reading the pins from left to right as:

1 → non inverting (pins 3 and 5 on a dual amp, 8-pin DIL)
2 → inverting (pins 2 and 6)
3 → Vcc (pin 8)
4 → Vee (pin 4)
5 → output (pins 1 and 7)

I’m obviously missing something here but for the life of me, I still can’t see the wood for the trees. I’m sure I ran earlier simulations (KiCAD 7, I didn’t do anything with v8).