Simulation of circuit with power nodes


I’ve been tinkering with a simple filter synthesis utility (at, but it’s still very much in an exploratory phase) that outputs .sch files that can be appended to schematics. If I add a voltage source for the input, and a couple of voltage sources for the rails, and then try to simulate e.g. the reference stage circuit (see the repo readme for a screenshot) I get the following errors:

Circuit: KiCad schematic
Error on line 8 : u1 net-c3-pad1 net-c3-pad2 0 vss 0 net-c4-pad2 net-c4-pad1 vdd lm358
Unable to find definition of model vss - default assumed
unknown parameter (net)
Error on line 14 : u2 vout net-c7-pad2 0 vss 0 net-c8-pad2 v1 vdd lm358
Unable to find definition of model vss - default assumed
unknown parameter (net)
Background thread stopped with timeout = 0
Doing analysis at TEMP = 27.000000 and TNOM = 27.000000
No. of Data Rows : 0

I’ve added a model for the LM358 just for simulation purposes. But if I understand the messages correctly, it looks like the power nodes vss,vdd are output as components and there is no model for these parts, rather than as nets with the names vss,vdd.

Is there something my program can add in a field to indicate these are to be treated as labels (net names) rather than components? I do notice the spice parameters are stored in the user F rows for components. Alternatively, is there a dummy component model I can use as a workaround?

When synthesizing a filter I want run a baseline simulation on the calculated passive component values to eyeball it for correctness. I’ll then proceed to change component values into standard, obtainable values, and rerun the simulation. At this point I want to see the difference between the two plots; ideally in the simulator itself (for example by saving the baseline and subtracting it, or plotting one on top of the other), or by storing the data to files and doing it myself. When realizing the physical circuit I want to pull trace data off my VNA and again compare. So an important function would be to save simulation plots to files. (I just mention this as a strongly suggested use case. I understand perfectly well it’s a work in progress; if I could manage to build KiCAD on OSX I’d look into adding it myself.)

Anyway, just a question and a suggestion. I’m using an OSX nightly about a week old. (I don’t see any commits that suggest any of this would be different, and besides it’s not really a bug report but more asking for how to go about running simulations with minimum legwork.) ngspice-27, although I just built and installed ngspice-28 (as a dylib) but haven’t checked it out yet.

Oh, and are there any plans to add schematic synthesis plugin support? I think something like this would be much more usable without having to go through the whole append schematic detour.

Here’s what the simulated circuit the above message relates to looks like… simulation.png


Perennial problem, but it’s very hard to diagnose problems when people post just a snippet of the project. Usually the problem is not where it is reported but somewhere else. I also suggest it better to keep topics to a single question.

In this case, I doubt that ngspice handles multi-unit components. You probably need a dedicated opamp symbol that corresponds to your model.

If you post the full netlist (Simulation->Show SPICE Netlist) and models you are using it might become clearer.

Edit; I don’t think there is a model type “U”, I would expect opamp to be a subcircuit “X”.


Ok, I have a definitive answer. It does not seem to be documented anywhere, but the first character of a data element in SPICE defines the type. For simple components that works fine, so “R” is a resistor, “C” is capacitor, but that pattern quickly breaks down. Transistors must be “Q”, but FETs are J, M or Z. You have used “U” which is a Uniform Distributed RC line (Chapter 6.3, ngspice manual). The fourth parameter is the model name, which is why ngspice thinks “vss” is the model name.

There does not appear to be a concise list of types anywhere (nor even a formal definition of SPICE syntax), so study of the manual is required.

After further study :slight_smile: it is documented in Chapter 2.1.2 Circuit Elements (device elements)


Ah, it apparently was the op amp, not the power nodes at all. Progress!

I switched the model to TI’s pspice model ( from

I set the Spice_Primitive to X for the opamps, made them all ref X? instead of U?, Unit A, and set their model to point to the TI PSpice model.

I also edited the pspice model to remove the trailing ^Z (what is this, CP/M???) and used dos2unix to remove the DOS style CR-LF line endings. They were making editing the spice properties very slow.

With “set ngbehavior=ps” in ~/.spiceinit it now runs, but fails to complete an AC analysis…
spice.error.txt (10.1 KB)

This looks very odd. For example:

vdd 0.856583 0.856583


vss -0.856583 -0.856583

these should be +15V and -15V; both sources are set to “dc 15”.

Model - LM358_ti.lib (1.1 KB)


Please post the source…


spice.netlist (1.7 KB)


Hmm, looking at the netlist it’s not clear if GND is specified to be 0…
It also looks like the X? parameter list is in the wrong order? But I don’t really know a lot about spice, much less how KiCAD integrates with it!


KiCad generally uses “GND” label for ground, but for SPICE must be “0”. There is a SPICE gnd symbol in pspice.lib.

Simulating the “native” kiCad schematic directly generally won’t work, it needs some non-trivial conversion to SPICE compatible netlist.

It seems KiCad automatically prepends the SPICE primitive to all references, and Spice_primitive overrides the automatic detection, so you could still use U1 and Spice_primitive=“X”.

ngspice has a “diff” command to compare plots, but this is not available via KiCad. The KiCad gui is a bit basic, I actually find it easier to export the SPICE netlist and run directly in ngspice.

I am also wondering about the node order… but clearly it has to match the SPICE order.

Edit; I think KiCad uses numeric order, so for Unit A that is 1 2 3 4 8 which is not what the TI model expects. You could fix that by adding a field “Spice_node_sequence= …” to change the order.

Not sure how to fix the GND/0 problem and keep it compatible with both KiCad and SPICE. If you can that would be great, but you might consider a separate option to create SPICE compatible output.


I created a connection between GND and pspice:0, that seemed to make all references to GND in the netlist disappear in favor if 0.

Also, specifying the pin order for the nodes seem to help, and it now actually runs. But I can’t add add any signals to the plot… Weird.

I can easily add the Spide_xxx fields to make it just work, as long as the GND-to-0 association is added.


I think that will work, of course the labels on the PCB tracks will now be “0”. It might also cause an issue with hidden power pins labelled GND, but hidden pins are evil anyway. :slight_smile: I am never sure how KiCad picks labels when they are equal priority, user labels override power labels I think.

Nice script btw :+1:


Found the problem with adding signals to the plot… I had specified the end frequency as “1M” without checking the box below. I removed the values in the AC tab and simply added a custom entry to the Custom tab, “.ac dec 100 10 1MEG” and it now runs the basic simulation fine!

Circuit: KiCad schematic
Background thread stopped with timeout = 0
Reducing trtol to 1 for xspice ‘A’ devices
Doing analysis at TEMP = 27.000000 and TNOM = 27.000000
Note: Starting dynamic gmin stepping
Trying gmin = 1.0000E-03 Warning: Further gmin increment
Trying gmin = 5.6234E-03 Warning: Further gmin increment
Trying gmin = 8.6596E-03 Warning: Further gmin increment
Trying gmin = 9.6466E-03 Warning: Further gmin increment
Trying gmin = 9.9105E-03 Warning: Further gmin increment
Trying gmin = 9.9775E-03 Warning: Further gmin increment
Trying gmin = 9.9944E-03 Warning: Further gmin increment
Trying gmin = 9.9986E-03 Warning: Further gmin increment
Trying gmin = 9.9996E-03 Warning: Last gmin step failed
Note: Dynamic gmin stepping completed
Reference value : 1.00000e+01

No. of Data Rows : 501

I can add signals and probe, but nothing ever shows on the plot. Well, almost. Vdd shows if I add it. I think the problem is the vertical axis scaling… It’s not manually settable, and the automatic scaling doesn’t seem to work.

I’ll try the latest nightly to see if it fixes it.
Same with kicad-20180617-033037.4959f91-c4osx.dmg

So… I think what I’ll end up doing is add the ability to generate a separate simulation project - a complete project with a schematic with sources, pspice:0 for ground, models, X? instead of U? (it’s not enough to just set Spice_Primitive, unfortunately) and anything else needed to just press the “go” button. This can then be tweaked and values transferred to the “real” project with a more normal circuit. Is it possible to create sub projects in sub folders? One pain point with this scheme is the inability of KiCAD to have multiple projects open, but at least I’d get from point A to point B. :slight_smile:


If I save to a csv file I see…

V(VOUT) (mag);nan;nan;nan;nan;nan; …
V(VDD) (mag);-inf;-inf;-inf;-inf;-inf; …

This doesn’t look right. :frowning:

But, it seems to work with a different model I found elsewhere!


I was just reading this blog post

He notes that “off the web” models are often buggy, so I wouldn’t be surprised. There are differences between simulators, even if based on similar SPICE code. It’s possible the equations converge in one sim and not another.

You can create a project in a sub-folder, but KiCad will treat it as a separate project.

KiCad will run multiple projects if you start a new instance (at least on Windows), it gives you are warning but it will still run, as long as you don’t open the same project twice.

BTW, I am just trying latest master code, the references are now output differently so we get R1 instead of RR1. There seems to be a bug with the netlist and net labels, kiCad offers to plot signals that don’t exist in the netlist it sends to the simulator.


Nice! Thanks! Yeah, I always been skeptical of random models off the net… Maybe what I’ll do is provide a generic “ideal” opamp model. Then if a custom model is dropped in at least it provides a sane point of comparison. Clearly if the response say drops 10dB across the passband by simply swapping a model, the model is broken. (In fact I see wildly different gain with different models. Very odd.)


If you need extremely fast, and simple simulation for OpAmp, power, switching, thermal… try NL5. I use ngspice for check again manufacture part, and NL5 for quickly test out the idea. NL5 also read all source of wave files (even from oscilloscope too) - and use them as input to your circuit very easy.

How can I generate a .raw file for use in a 3rd party waveform viewer?

You can try some of mine ideal model too: