Simulation not matching LTSpice

Here’s the circuit that I am having problems with:


The green line is the voltage on the collector and the blue line is the voltage on the emitter. As you can see, the difference is nowhere near 2.5V, which is what LTSpice gives. I believe this is a problem with my transistor model, which is here:
.model MMBTH10 npn
+ IS=69.28e-18 XTI=3 EG=1.11 VAF=100
+ BF=308.6 NE=1.197 ISE=69.28e-18 IKF=22.83e-3
+ XTB=1.5 BR=1.11 NC=2 IKR=0
+ RC=4 CJC=1.042e-12 MJC=0.2468 VJC=0.75
+ FC=0.5 CJE=1.52e-12 MJE=0.3223 VJE=0.75
+ TR=1.558e-9 TF=135.8e-12 ITF=0.27 VTF=10
+ XTF=30 RB=10

Does anyone know why this is happening? Also does anyone know how to measure current through a component? Thanks.

I also already used an alternate node sequence (which was 3 2 1).

On LTspice, did you click on a node with the voltage probe?
I think on LTspice, when the mouse hovers over a suitable pin the cursor changes from a voltage probe to a current probe.

3 2 1 is wrong, the sequence has to equivalent to c b e, which according to your circuit is 1 2 3. So no need to set an alternate node sequence.

Did you check your circuit with another bipolar model parameter set?

Collector voltage 5V (ngspice) tells me that there is no collector current flowing.

I tried changing it to 1 2 3 but it still doesn’t work.


For comparison when using 3 2 1, the collector voltage is 4.78V, but here, it’s 5V.

I know how to measure current in LTSpice.
Is there an easy way of doing it in the Kicad simulator? I can’t figure out how to add a current probe.

You said “Also does anyone know how to measure current through a component?”

So, I think you need more information in your questions…

I also tried adding an AC signal. If I use 3 2 1 it gets amplified ~40 times, but if I use 1 2 3 the voltage is still 5V.

Something seems to be wrong in your setup.

Please post your ngspice netlist here. You did not tell us what KiCad version you are using.

If 5.99 Eeschema --> File --> Export -->Netlist --> Spice --> Export Netlist
If 5.1.10: Eeschema --> Tools --> Generate Netlist File --> Spice --> Generate Netlist

You might also post your project as a zipped file, so we can have a look.

Netlist (edited because I realized I put the wrong netlist up):

.title KiCad schematic
.include "MMBTH10.lib"
R1 Net-_R1-Pad1_ Net-_Q1-Pad2_ 10k
C2 Net-_C2-Pad1_ 0 10u
V2 Net-_R1-Pad1_ 0 dc 5
R2 Net-_Q1-Pad2_ 0 8.5k
R4 Net-_C2-Pad1_ 0 1.5k
R3 Net-_R1-Pad1_ Net-_C3-Pad2_ 1.04k
C3 Net-_C3-Pad1_ Net-_C3-Pad2_ 10u
R5 Net-_C3-Pad1_ 0 100k
Q1 Net-_C3-Pad2_ Net-_Q1-Pad2_ Net-_C2-Pad1_ MMBTH10
.end

I can’t upload the file normally since I’m a new user but here’s the zip on another website: https://ufile.io/z0f9su15

Here’s what the simulator prints:
image

To measure current, you can add a VSOURCE with 0V as value, in series.

I made it smaller as a custom symbol to not clutter the schematics, see attached library below:

pspice_new.dcm (1.4 KB) pspice_new.lib (11.6 KB)

Thanks, I’ll keep that in mind!

This is not the spice netlist (you did not follow my steps given?).

It is a problem with your model parameters. The ones shown in your previous post are not the same as used in your projet.

Compare ise=69.28p (your project)
with ise=69.28e-18 (original model from Fairchild and your text posted above)

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Thanks, that was the problem.
Looks like I miscopied it somehow (or maybe accidentally changed it when I was trying to figure out what was wrong).


I get the right answer now. Thanks!

BTW I found an easier way to measure current.
If you click the add signal button you are able to select the current going through the collector and base of the transistor. This method is much easier.