Simulate AOP Generator

Schematic Simulation (Ngspice)
1

Hi folk, I try to simulate a simple AOP square/triangle generator using Kicad 5.0.2.
On my schematic I add a ngspice model for 741 Opamp found on the web, here it is :

  • UA741 OPERATIONAL AMPLIFIER “MACROMODEL” SUBCIRCUIT
  • CREATED USING PARTS RELEASE 4.01 ON 07/05/89 AT 09:09
  • (REV N/A) SUPPLY VOLTAGE: +/-15V
  • CONNECTIONS: NON-INVERTING INPUT
  •            | INVERTING INPUT

  •            | | POSITIVE POWER SUPPLY

  •            | | | NEGATIVE POWER SUPPLY

  •            | | | | OUTPUT

  •            | | | | |

.SUBCKT UA741 1 2 3 4 5
*
C1 11 12 4.664E-12
C2 6 7 20.00E-12
DC 5 53 DX
DE 54 5 DX
DLP 90 91 DX
DLN 92 90 DX
DP 4 3 DX
EGND 99 0 POLY(2) (3,0) (4,0) 0 .5 .5
FB 7 99 POLY(5) VB VC VE VLP VLN 0 10.61E6 -10E6 10E6 10E6 -10E6
GA 6 0 11 12 137.7E-6
GCM 0 6 10 99 2.574E-9
IEE 10 4 DC 10.16E-6
HLIM 90 0 VLIM 1K
Q1 11 2 13 QX
Q2 12 1 14 QX
R2 6 9 100.0E3
RC1 3 11 7.957E3
RC2 3 12 7.957E3
RE1 13 10 2.740E3
RE2 14 10 2.740E3
REE 10 99 19.69E6
RO1 8 5 150
RO2 7 99 150
RP 3 4 18.11E3
VB 9 0 DC 0
VC 3 53 DC 2.600
VE 54 4 DC 2.600
VLIM 7 8 DC 0
VLP 91 0 DC 25
VLN 0 92 DC 25
.MODEL DX D(IS=800.0E-18)
.MODEL QX NPN(IS=800.0E-18 BF=62.50)
.ENDS

Here the spice model editor

image
image681×658 34.9 KB

Do I need to setup the field “Alternate node sequence” ?
If yes how to setup it ?

My problem is when I run the simulation I get this error message :

image

Any ideas are welcome !

2

Please have a look at http://ngspice.sourceforge.net/ngspice-eeschema.html#OpAmp

3

Thanks holger, I’ll check and return if I found a solution. :wink:
In fact that’s thé référence site I use for my exemple. It works partially for transistor but not for OpAmp.

4

If you’re using the LM741 symbol that comes with KiCad, it has 7 ports instead of the 5 that your UA741 model requires (i.e. no offset null pins). Therefore, you should put the following for Alternate Node Sequence: 3,2,7,4,6

5

Hi Ste, you’re right, by adding this pin assign that remove first :

  • Too many parameters for subcircuit type “ua741” (instance: xxu1)
    and
  • Too many parameters for subcircuit type “ua741” (instance: xxu2)
    but it seems not suffisant, at the end no simulation start, here the complete report :
    Circuit: KiCad schematic
    Reducing trtol to 1 for xspice ‘A’ devices
    Doing analysis at TEMP = 27.000000 and TNOM = 27.000000
    Note: Starting dynamic gmin stepping
    Trying gmin = 1.0000E-003 Warning: Further gmin increment
    Trying gmin = 5.6234E-003 Note: One successful gmin step
    Trying gmin = 4.2170E-003 Note: One successful gmin step
    Trying gmin = 2.7384E-003 Note: One successful gmin step
    Trying gmin = 1.4330E-003 Note: One successful gmin step
    Trying gmin = 5.4247E-004 Note: One successful gmin step
    Trying gmin = 2.0535E-004 Note: One successful gmin step
    Trying gmin = 7.7737E-005 Note: One successful gmin step
    Trying gmin = 1.8106E-005 Note: One successful gmin step
    Trying gmin = 2.0351E-006 Note: One successful gmin step
    Trying gmin = 6.8231E-007 Warning: Further gmin increment
    Trying gmin = 1.5486E-006 Warning: Further gmin increment
    Trying gmin = 1.9008E-006 Note: One successful gmin step
    Trying gmin = 1.7753E-006 Note: One successful gmin step
    Trying gmin = 1.6581E-006 Note: One successful gmin step
    Trying gmin = 1.6024E-006 Warning: Further gmin increment
    Trying gmin = 1.6440E-006 Note: One successful gmin step
    Trying gmin = 1.6231E-006 Note: One successful gmin step
    Trying gmin = 1.6024E-006 Note: One successful gmin step
    Trying gmin = 1.5922E-006 Note: One successful gmin step
    Trying gmin = 1.5770E-006 Note: One successful gmin step
    Trying gmin = 1.5544E-006 Note: One successful gmin step
    Trying gmin = 1.5432E-006 Warning: Further gmin increment
    Trying gmin = 1.5516E-006 Note: One successful gmin step
    Trying gmin = 1.5488E-006 Note: One successful gmin step
    Trying gmin = 1.5446E-006 Warning: Further gmin increment
    Trying gmin = 1.5478E-006 Note: One successful gmin step
    Trying gmin = 1.5467E-006 Note: One successful gmin step
    Trying gmin = 1.5457E-006 Note: One successful gmin step
    Trying gmin = 1.5452E-006 Note: One successful gmin step
    Trying gmin = 1.5446E-006 Warning: Further gmin increment
    Trying gmin = 1.5450E-006 Note: One successful gmin step
    Trying gmin = 1.5450E-006 Note: One successful gmin step
    Trying gmin = 1.5449E-006 Note: One successful gmin step
    Trying gmin = 1.5448E-006 Warning: Last gmin step failed
    Warning: Dynamic gmin stepping failed
    Note: Starting source stepping
    Supplies reduced to 0.0000% Note: One successful source step
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    Supplies reduced to 61.1930% Warning: source stepping failed
    Transient solution failed -
    Last Node Voltages

Node Last Voltage Previous Iter

vee 10.2164 9.17895 *
net-u1-pad3 1.03743 -2.46473e-149 *
vcc -8.14152 -9.17895 *
carrc 1.03743 -2.91081e-172 *
net-r1-pad1 -1.46733 -2.50475 *
triangle 1.03743 -2.46473e-149 *
net-c1-pad2 -2.23779 -3.27522 *
xu1.11 -2.16243 -3.19986 *
xu1.12 0.308057 -0.729369 *
xu1.6 34.0182 34.0182
xu1.7 1.30848 968.173 *
xu1.53 -9.73254 -10.77 *
xu1.54 11.8074 10.77 *
xu1.90 -0.291407 -1.29088e+006 *
xu1.91 15.2982 15.2983
xu1.92 -15.2982 -15.2983
xu1.99 1.03743 0 *
xu1.10 -0.737314 -1.77474 *
xu1.13 -1.76677 -2.80419 *
xu1.14 0.302316 -0.73511 *
xu1.9 0 0
xu1.8 1.30848 968.173 *
xu2.11 -2.92934 -3.96677 *
xu2.12 0.308924 -0.728502 *
xu2.6 44.5905 44.5906
xu2.7 1.29678 -3.08091e-149 *
xu2.53 -9.73254 -10.77 *
xu2.54 11.8074 10.77 *
xu2.90 0.146732 -1.29088e+006 *
xu2.91 15.2982 15.2983
xu2.92 -15.2982 -15.2983
xu2.99 1.03743 0 *
xu2.10 -0.603884 -1.64131 *
xu2.13 -1.50129 -2.53872 *
xu2.14 0.303721 -0.733705 *
xu2.9 0 0
xu2.8 1.29678 -3.08091e-149 *
h.xu2.hlim#branch -2.93465e-013 2.58176e-006 *
v.xu2.vlim#branch 0.00172904 -4.10788e-152 *
h.xu1.hlim#branch 5.82814e-013 2.58177e-006 *
v.xu1.vlim#branch 0.001807 6.45449 *
v.xu2.vln#branch -1.54458e-011 1.29087e-006 *
v.xu2.vlp#branch -1.42945e-011 0.000127797 *
v.xu2.ve#branch -5.56287e+165 -5.56404e+165
v.xu2.vc#branch -5.56287e+165 -5.56404e+165
v.xu2.vb#branch 0.000445905 0.000445906
v.xu1.vln#branch -1.50076e-011 1.29087e-006 *
v.xu1.vlp#branch -1.55905e-011 -1.2909e-006 *
v.xu1.ve#branch -5.56287e+165 -5.56404e+165
v.xu1.vc#branch -5.56287e+165 -5.56404e+165
v.xu1.vb#branch 0.000340182 0.000340182
v2#branch -2.87002e+293 -2.87105e+293
v1#branch -2.87002e+293 -2.87105e+293
a$poly$e.xu2.egnd#branch_1_0 0 0
a$poly$e.xu1.egnd#branch_1_0 -0.000155905 -12.909 *
doAnalyses: Too many iterations without convergence
run simulation(s) aborted

Any idea ?

Thanks again !

6

First to check if the 741 model is o.k. (not guaranteded, especially when “found on the web”).

The following is a simple OpAmp amplifier, including your model as ua741.lib and running in discrete ngspice:

OpAmp 741 simple inverting amplifier

.include ua741.lib

X741 in+ in- v+ v- out UA741

VCC v+ 0 15
VSS v- 0 -15
Vz in+ 0 0

Rin in in- 10k
Rfb out in- 100k

Vin in 0 dc 0 SIN (0 0.1 10k)

.tran 1u 1m

.control
run
plot v(out) v(in)
.endc

.end

The plot output is o.k., thus the model is probably o.k. as well.

The simulator tells us that he is not finding the operating point of the circuit. This may happen when you try to simulate an oscillator. You may skip using the op by adding uic to the .tran line.

Edit the text box with the .tran line (double click onto the box on the circuit diagram) and add iuc like this
.tran 1u 1m uic
If this does not help, please post the netlist here.

7

Hi Holger, thanks, I use this model :

  • UA741 OPERATIONAL AMPLIFIER “MACROMODEL” SUBCIRCUIT
  • CREATED USING PARTS RELEASE 4.01 ON 07/05/89 AT 09:09
  • (REV N/A) SUPPLY VOLTAGE: +/-15V
  • CONNECTIONS: NON-INVERTING INPUT
  •            | INVERTING INPUT

  •            | | POSITIVE POWER SUPPLY

  •            | | | NEGATIVE POWER SUPPLY

  •            | | | | OUTPUT

  •            | | | | |

.SUBCKT UA741 1 2 3 4 5
*
C1 11 12 4.664E-12
C2 6 7 20.00E-12
DC 5 53 DX
DE 54 5 DX
DLP 90 91 DX
DLN 92 90 DX
DP 4 3 DX
EGND 99 0 POLY(2) (3,0) (4,0) 0 .5 .5
FB 7 99 POLY(5) VB VC VE VLP VLN 0 10.61E6 -10E6 10E6 10E6 -10E6
GA 6 0 11 12 137.7E-6
GCM 0 6 10 99 2.574E-9
IEE 10 4 DC 10.16E-6
HLIM 90 0 VLIM 1K
Q1 11 2 13 QX
Q2 12 1 14 QX
R2 6 9 100.0E3
RC1 3 11 7.957E3
RC2 3 12 7.957E3
RE1 13 10 2.740E3
RE2 14 10 2.740E3
REE 10 99 19.69E6
RO1 8 5 150
RO2 7 99 150
RP 3 4 18.11E3
VB 9 0 DC 0
VC 3 53 DC 2.600
VE 54 4 DC 2.600
VLIM 7 8 DC 0
VLP 91 0 DC 25
VLN 0 92 DC 25
.MODEL DX D(IS=800.0E-18)
.MODEL QX NPN(IS=800.0E-18 BF=62.50)
.ENDS

This was found on web, do you see any fail ?
Thanks.

8

In complement I’ve allready the .tran 1u 10ms 0

image
image1052×562 7.08 KB

The simulation result :

Circuit: KiCad schematic
Reducing trtol to 1 for xspice ‘A’ devices
Doing analysis at TEMP = 27.000000 and TNOM = 27.000000
Initial Transient Solution

Node Voltage

vee 0
net-u1-pad3 0
vcc 0
carrc 0
net-r1-pad1 0
triangle 0
net-c1-pad2 0
xu1.11 0
xu1.12 0
xu1.6 0
xu1.7 0
xu1.53 0
xu1.54 0
xu1.90 0
xu1.91 0
xu1.92 0
xu1.99 0
xu1.10 0
xu1.13 0
xu1.14 0
xu1.9 0
xu1.8 0
xu2.11 0
xu2.12 0
xu2.6 0
xu2.7 0
xu2.53 0
xu2.54 0
xu2.90 0
xu2.91 0
xu2.92 0
xu2.99 0
xu2.10 0
xu2.13 0
xu2.14 0
xu2.9 0
xu2.8 0
h.xu2.hlim#branch 0
v.xu2.vlim#branch 0
h.xu1.hlim#branch 0
v.xu1.vlim#branch 0
v.xu2.vln#branch 0
v.xu2.vlp#branch 0
v.xu2.ve#branch 0
v.xu2.vc#branch 0
v.xu2.vb#branch 0
v.xu1.vln#branch 0
v.xu1.vlp#branch 0
v.xu1.ve#branch 0
v.xu1.vc#branch 0
v.xu1.vb#branch 0
v2#branch 0
v1#branch 0
a$poly$e.xu2.egnd#branch_1_0 0
a$poly$e.xu1.egnd#branch_1_0 0
Reference value : 0.00000e+000
doAnalyses: TRAN: Timestep too small; time = 1e-017, timestep = 1.25e-018: trouble with xu1:dx-instance d.xu1.dc
run simulation(s) aborted
Reducing trtol to 1 for xspice ‘A’ devices
Doing analysis at TEMP = 27.000000 and TNOM = 27.000000
Initial Transient Solution

Node Voltage

vee 0
net-u1-pad3 0
vcc 0
carrc 0
net-r1-pad1 0
triangle 0
net-c1-pad2 0
xu1.11 0
xu1.12 0
xu1.6 0
xu1.7 0
xu1.53 0
xu1.54 0
xu1.90 0
xu1.91 0
xu1.92 0
xu1.99 0
xu1.10 0
xu1.13 0
xu1.14 0
xu1.9 0
xu1.8 0
xu2.11 0
xu2.12 0
xu2.6 0
xu2.7 0
xu2.53 0
xu2.54 0
xu2.90 0
xu2.91 0
xu2.92 0
xu2.99 0
xu2.10 0
xu2.13 0
xu2.14 0
xu2.9 0
xu2.8 0
h.xu2.hlim#branch 0
v.xu2.vlim#branch 0
h.xu1.hlim#branch 0
v.xu1.vlim#branch 0
v.xu2.vln#branch 0
v.xu2.vlp#branch 0
v.xu2.ve#branch 0
v.xu2.vc#branch 0
v.xu2.vb#branch 0
v.xu1.vln#branch 0
v.xu1.vlp#branch 0
v.xu1.ve#branch 0
v.xu1.vc#branch 0
v.xu1.vb#branch 0
v2#branch 0
v1#branch 0
a$poly$e.xu2.egnd#branch_1_0 0
a$poly$e.xu1.egnd#branch_1_0 0
doAnalyses: TRAN: Timestep too small; time = 1e-017, timestep = 1.25e-018: trouble with xu1:dx-instance d.xu1.dc
run simulation(s) aborted
Error: no such vector carri
Error: no such vector carri
Reducing trtol to 1 for xspice ‘A’ devices
Doing analysis at TEMP = 27.000000 and TNOM = 27.000000
Initial Transient Solution

Node Voltage

vee 0
net-u1-pad3 0
vcc 0
carrc 0
net-r1-pad1 0
triangle 0
net-c1-pad2 0
xu1.11 0
xu1.12 0
xu1.6 0
xu1.7 0
xu1.53 0
xu1.54 0
xu1.90 0
xu1.91 0
xu1.92 0
xu1.99 0
xu1.10 0
xu1.13 0
xu1.14 0
xu1.9 0
xu1.8 0
xu2.11 0
xu2.12 0
xu2.6 0
xu2.7 0
xu2.53 0
xu2.54 0
xu2.90 0
xu2.91 0
xu2.92 0
xu2.99 0
xu2.10 0
xu2.13 0
xu2.14 0
xu2.9 0
xu2.8 0
h.xu2.hlim#branch 0
v.xu2.vlim#branch 0
h.xu1.hlim#branch 0
v.xu1.vlim#branch 0
v.xu2.vln#branch 0
v.xu2.vlp#branch 0
v.xu2.ve#branch 0
v.xu2.vc#branch 0
v.xu2.vb#branch 0
v.xu1.vln#branch 0
v.xu1.vlp#branch 0
v.xu1.ve#branch 0
v.xu1.vc#branch 0
v.xu1.vb#branch 0
v2#branch 0
v1#branch 0
a$poly$e.xu2.egnd#branch_1_0 0
a$poly$e.xu1.egnd#branch_1_0 0
Warning: singular matrix: check nodes v.xu2.ve#branch and v1#branch
Warning: singular matrix: check nodes v.xu2.ve#branch and v.xu2.vc#branch
Warning: singular matrix: check nodes xu2.54 and v1#branch
doAnalyses: TRAN: Timestep too small; time = 1e-017, timestep = 1.25e-018: trouble with xu1:dx-instance d.xu1.dc
run simulation(s) aborted

9

Typical order for troubleshooting convergence issues:

  1. Something is wrong with your circuit. You either made an unintentional drafting mistake, or the design is horribly wrong which results in wacky voltages & currents.
  2. You’re simulating a behavior which has no valid DC operating point, such as an oscillator as mentioned above. You need to use either .ic or .nodeset commands to help the program arrive at an initial solution. Sometimes GMIN needs to be adjusted in extreme cases.
  3. The subcircuit supplied from the manufacturer (or elsewhere) is garbage and was poorly tested prior to release.

Usually #1 is the most common, and it is also true in this specific case. In your circuit, VEE is at higher potential than VCC. Flip your batteries around and you should get different results.

10

Hi Ste, you’re right, supply are inverted and schematic is wrong, I correct it and now all is really better :

image
image973×520 7.72 KB

I don’t know if the Aop model is not really good, but signal simulation are now present :

image
image810×611 45.8 KB

By using the .tran 1u 5ms uic (or without uic) I don’t see any differences.
Not sure ti understand the .control (then .endc) is this mean automatic plot of v(Name) when running simulation ?

Thanks again.

PS: For all interested I’m able to joint the schematic and lib file, do you know how to joint to this post ?

11

The .control … .endc block is of no use here.

It may be required if you run plain ngspice outside of KiCad.

12

Hi Holger, thanks, I’m self learning ngspice and I discover it step by step. Is there a way when you run the Kicad simulator to highlight specific signal ? Thanks again. Vincent.