Setting pads of vias in inner layers

I am designing a four layer board with BGA.
I need to remove unused pads from vias to have more space for routing.

I’m using the current night build.

Demonstration of interfering unused pads.

I came across an older thread since 2015.
However, I am not satisfied with the proposed solution, so I would like to ask what are the options in the current version.

During Googleing, I came across how easy it is to solve Altium.

I think what you are referring to would be considered board stack up which is not currently available. Files are text based so you could probably change things there.

Not really. It would be called pad stackup.
Board stackup handles the general composition of the board itself (how many layers, what are the exact properties of each layer especially dielectrics, how thick is every layer, …) Board stackup tools are already in KiCad nightly and will therefore be in version 6. Pad stackup might however be postponed to version 7 if i remember correctly.

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