Appreciate finding out what are safe design rule settings for KiCad? Been a long time since I have laid out a PCB and now retired I am wanting to do some fun designs for the grandkids to help them understand some basic electronics.
Would be great to get what design rules settings you use. Are these dependant on the PCB fabrication facility? Most probably be using JLCPCB fabricators and only designing 2 layer PCB’s. I will not be designing ridiculously tight layouts.
Also I am assuming that the “in” are in thousandths (1/1000th = 0.0254mm)? Working in inches is somewhat foreign to me we went metric here in Australia in 1966 when I was 10yo. But it seems that the PCB world works in thou’s?
Net Class Editor
Track width ?
Via Dia ?
Via Drill ?
uVia Dia ?
uVia Drill ?
Global Design Rules
Minimum Track width ?
Minimum Via diameter ?
Minimum Via drill ?
Minimum uVia diameter ?
Minimum uVia drill?
Appreciate finding out what settings you use.
I have been using OSH Park for my board designs; and pushing their limits on some of the specifications.
How else are you going to know where the problem is if what you get back is from only one cheap place?
Yes they are. Even within the fab it depends on what exactly you buy. (Some fabs offer more expensive options with tighter tolerances)
If you want to know what DRC settings to use, read the instructions of the fab. (They will not tell you how to setup kicad but they will tell you what their minimum track to track clearances, min track width, min annular ring, min soldermask widht, … are.)
Thanks for the replies.
I found JLC PCBs design rules. Here is the link for any others who are searching for design rules and wanting use JLC.
You might consider taking all the room they give you then. That means setting your tolerances as LARGE as you can get away with. Fat traces with lots of clearance. I did a board for someone that I used 12 mill traces on and then played with the clearance until I could just get a trace between a standard DIP package pinout. If you don’t need to go between things like the pins on a DIP, go larger. For simple projects with the grandkids don’t overlook the usefulness of being able to see the tracks clearly and easily.
My eldest granddaughter is only 3.5 years but she’s inquisitive. I’m thinking of breadboarding a ‘flashlight’ and adding a potentiometer and seeing how interested she is in that.
If you decrease the clearance below the KiCad default, don’t forget to decrease the soldermask expansion, too!
I’d recommend that you decrease the default solder mask clearance even if you use the Kicad default copper clearance.
Thank you for all your valuable inputs and the links, most helpful. The info that your links lead me to OSHPark design rules site was very helpful.
It a pity KiCad doesn’t support a import/export design rule feature that allow the various PCB fabricators to generate a design rule profile so you can import at the start of a project.
I will decrease the solder mask clearance as well.
Is there a standard format for this?
I read somewhere that the templates can be used for this purpose, but they look more oriented to board shapes etc.
In nightly builds (and future v5.1) you can import Board Setup settings simply from a project (.pro) file. You can create a dummy project, set the settings, save the project and then use it as a board settings import file in other projects.
Yeah, I wish there were some sensible “presets” or “dimensional themes” that I could just select with ONE dropdown and then not worry about it until I get into a situation where, for example, 8 mill is too much and only 6 mil or 4 mill will work.
The problem is that there are several geometric concerns to think about-- not just track width and spacing, but also via dimensions, via-track spacing, mask gaps, and all the geometry associated with copper pours. These things tend to change together. I get a feeling that there is a wide envelope in which one can make decisions with this stuff and lore or experience seems to be only guide.
I do see something related to this kind of stuff in the PCB calculator, but no one seems to know what this tab means, screenshot below…
That appears to be some kind of “class designation” for some aspects of PCB geometry. Does anyone know what this table means?
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