I did a footprint of a interdigital filter related to this topic: Distributed Element Filter Footprint
The device consists basically of transmissions lines connected to CPW lines (in/out). Additionally, I must have a zone without copper around those transmission lines. In order to achieve this on the footprint editor (and to overcome some limitation of fill zone) I created some polygon to define the zone without copper. These polygons are part of F.Cu layer and must part of GND. So, I used the footprint in a layout and I got just this:
It shouldnāt have this gap around the polygons, because all the fill zone is GND. However, I donāt know how to ālabelā this polygon as GND to get everything connected.
** I must have this clearance around tracks due to CPW parameters (impedance).
hi,
it took me a bit ā¦
but as I thought the solution is dirty
attached a board with the fill zone as required (with only 1 pad inserted)
you need to create fill zones with the points from your poly zones
(with a text editor)
you need to copy the pads and silk from your fp (with a text editor)
you need to adjust all the pads substituting GND with a sequential pad nbr (with a text editor)
just copy the text of fill zones and fp in the board you have and adjust net number
then to move the obj, you need to move fill zones and fp together filter-3th-fz-edited.kicad_pcb (8.1 KB)
I donāt think there is other way to make your poly connected to GND
I looked in the footprints editor and the symbol editor or pcbnewā¦ neither of the tools has got a way to create those.
Itās also no wonder that these copper areas wonāt connect to a net/zoneā¦ they have no net option.
I would convert the fp-poly stuff into SMD pads with pin numbers and as you said, give all the PTHs a pin number as well (probably 3), instead of āGNDā.
Should then be possible to have this thing as a footprintā¦
I think the idea of use multiples pads would work, although it is going to return some errors because I will get the vias crossing the pads. It is a tricky solution but it could solve my problem by now. @maui I will analyse your workaround when I get my notebook.
Anyway, I am not sure there is a trivial solution to this case.
Not if they got the same pin numberā¦ the only problem you would encounter with that approach are ratnest/track layingā¦ but as itās GND plane stuff, no worries.
Btw, check the 3D view of the kicad_mod of yoursā¦ all PTHs still have got silkscreen circles on themā¦ donāt think you want that (looks ugly and fulfills no purpose).
a useful workaround would be to have a tool to convert DXF in a multiple pads module, so it would be easier to have RF parts as footprint
may be @Joan_Sparky could think something about it
Graphically they all talk about something like this (with/without holes makes a difference and also what kind of specifications the rectangles need to have)ā¦
If I find some free time I might actually try this, but donāt hold your breath please.
No really, donāt hold your breath.
I implemented the idea of substituting polygons by as much rectangular pads as needed to cover the same area. I gave them the number 3 and added a pin on its schematic symbol. Then, I connected pin 3 to GND and regenerated the netlist file.
Here, the footprint:
And here, the result on the layout:
I can say it is a progress however I lost the non-copper zone in the middle part. I donāt know how to avoid the fill in this area.
EDIT: NOT WORKINGā¦
One ideaā¦ probably not working, but you can tryā¦
Create a SMD pad, same/similar size as the zone I suggested in the footprint above.
Change itās layer to something like Cmts.User only.
Maybe it keeps the fill out - fingers crossed.
The more practical and useful solution that I got was using keep out zones. It works but I need to define the keep out zone on the layout. So, whenever I move the footprint I also need to do the same with the keep out. Ok, itās not so complicated but itās just a workaround, not a final solution.
Anyway, thanks for your help.
Here, the final result:
Currently interested in some of this myself. I find it strange you can draw polygons but not assign them to the copper layer in KiCAD footprint editor?
I suppose this should be an easy fix in the code? No?
RF question: Why CPW for input and ouput and not microstrip? Because of FR4 & 2 layer board?
Not worried about transition from CPW to microstrip filter and back to CPW? (Guess would depend on frequency)
You canāt draw filled polygons in the fp editor currently, thatās why I asked up there where those came from.
And even if you get them done via Bitmap2Component module (start via KiCAD main menu), they wonāt attach to any net, thus you canāt flow or use them really (unless you disable DRC).
One thing is for sure, those DEFs as footprints need a way to draw filled polygons (even with arc outlines) and a way to specifiy no-fill areas. All possible in PCBnew on board level, but not in the FP editor - on footprint level.
IMHO the fp editor needs an overhaul and more options. Dunno when this will happen though as they just went over that part of KiCAD and now focus on EEschema afaik.
@Joan_Sparky
if they would add just the ability to add filled poly to a net would solve the pcb issueā¦ (using Bitmap2Component for designing the poly)ā¦
I had asked some RF improvements a month ago https://lists.launchpad.net/kicad-developers/msg21602.html
but unfortunately, as you pointed out, they are focusing on eeschemaā¦
@tipofthesword
Iād like to start playing a bit with RF/high speed signals, but Iām really a newbie in that fieldā¦
would you mind to suggest me where I could get some tips to start working with?
I mean I found some tech advice at https://www.maximintegrated.com/en/app-notes/index.mvp/id/5100
but I was wondering if there is some video/doc about some simple RF circuit design with basic examples, or some nice bookā¦
Nice questions!
Actually itās possible to assign polygons to copper, you just need to edit the kicad_mod file, thatās easy.
In this project I used CPWG because itās possible to isolate the signal and avoid interference applying stitching vias. Additionally, you can reach the same impedance using CPW with a narrower transmission line width than using microstrip lines, almost two times in this case. This is also important since I have to connect the tracks in tiny smd pads.
The transition between CPW and microstrip is a ācriticalā point because there are differences between the propagation modes of the structures. However, I simulated the filter model in an EM software and everything was OK. I also built a prototype and everything works just fine. The frequency in this case is 2.4 GHz.
Good point about the filled polygon. Hadnāt realized thatā¦
I guess Iāll also have to go the bitmap2component route and then edit
manually in PCBnew.
By the way, the PCB board is not complete in the last figure. Every track will be surrounded by stitching vias, not only the filter structure. I doing this part right now and I can point out another good RF feature which would be very good to have in this case: a script to automatic add those stitching vias around the tracks where RF signals are flowing.
Unfortunately, I have almost zero experience with python and Iāve never developed any script for kicad.
