Please review my board

I wonder if someone would be so kind as to take a look at my board and give it a quick review.

Please be keep in mind that I’m just a rank amateur at this. This is the third revision of this board and actually only the first board I have designed. I hope my lack of knowledge isn’t too glaring. :slight_smile:

just a note, I realize some may not like the lack of reference marks for the parts, but I prefer the clean look.

Thanks in advance for your criticism.

GTReef.zip (803.4 KB)

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  1. I don’t like to stand TO-220 parts up vertically like that. They become quite vulnerable to being broken or vibrated off. Also, that will then be the tallest part on your board by a fair bit, won’t it? It seems like there is plenty of room to lay that part flat on the board. If surface mount was an option I personally would prefer that too.
  2. I’m not really sure why you decided to put SMD parts on both sides of the board. It looks to me like it would be quite trivial to keep all SMD parts on one side, which will decrease assembly costs.
  3. Some of the JST connectors in the bottom right quadrant don’t have the +/-/whatever marked on the silkscreen which seems inconsistent.
  4. You’ve put vias inside surface mount pads. That’s asking for soldering problems. There is only a limited quantity of solder paste that gets stencilled on, and if it wicks into a via you may not have enough left to get good fillets on the pins. For the big thermal pads on the DC-DC converter section this shouldn’t be a problem, but probably will be for the SOT-23 parts with vias in the pads. Consider the volume of that through hole compared to the area of the pad.
  5. I would add a whole pile more vias all over the place to make sure there is a good low-impedance connection between various areas on the ground planes.

EDIT: above notes made from looking only at the screenshots - I did not download the files at the time, somehow missed that they were attached.

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I had a short peek at the attached project and saw it is a 4 layer board. 4-layer boards are more expensive to order, but also more easier to route compared to 2 layer PCB’s. It’s a quite simple board and should be able to be done well on 2 layers.

And despite these 4 layers, none of them is a full GND plane.
Adding stitching via’s such as DavidR suggested helps to improve the GND plane but on a 4 layer PCB you have plenty of room to make a dedicated layer for GND.

For the schematic, I do not like the rectangular boxes around each small part. They do not add useful information, but take up time to draw and maintain. Just curious how many time you redraw those boxes.

You’ve also got plenty of space on you schematic, but there are quite a lot of texts overlapping with other things, which makes them more difficult to read, especially for example when printed on black & white.
Why cram 3 resistors in a box and make their texts unreadable?
image image

Power is my thing and I am having a quick look. What is the output current from U1? If you care about noise and voltage spikes, try to minimize the stray inductance between U1 and U4. (Why would you assign a diode a “U*” reference designation? Most common would be “D*” or perhaps “CR*”.) With your LM2596 the D pak schottky diode should work, but a smaller package lower inductance diode would probably reduce spikes, ringing, and noise. This is sort of an over-example in that I had not expected to come up with a SOD123 package for 3A rating:

I guess I would prefer something a bit bigger for that current. The package type offers good heat transfer and lower inductance than a Dpak:

Try to read up on pcb layout of a “hot loop.”.

https://www.google.com/search?q=buck+regulator+layout+hot+loop&oq=buck+regulator+layout+hot+loop&aqs=chrome..69i57j33i160.7374j0j15&sourceid=chrome&ie=UTF-8

I am not a big fan of LT but I think that is a term that LT (now ADI) uses. Copper zones can help reduce inductance and also provide heatsinking for these components.

+2.

You have to know what’s the assembly process. Machine or manual? Do you pay for it or try to do it yourself? As it is now it may become expensive and error prone. If you tell how it will be assembled and what are the tools, we may give more accurate advice. You will regret if you will notice afterwards it was impossible to assemble it reliably.

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Look at this P12V zone in In1.Cu.


(The screenshot is from KiCad v5.99.)

It’s useless as a plane. It doesn’t offer continuous route for the current. You have the trace which does the work in F.Cu and the inner layer “plane” isn’t used.

There are also areas which are potential antennas:

image

The arrow is on an isolated area and points to the only connection to another layer.

The other inner layer is also inefficient use of the board space.

With 4 layers you should indeed be able to get all the SMD components on one side if there’s enough physical space. And get vias outside the pads (except for the thermal vias).

Most of the advices above are right and I agree with them.

  • first, add continuous ground plane on one of the layers.
  • do all the routing on Top + Bot, try to avoid routing on inner layers
  • avoid vias on SMD pads, it have been said before but it’s critical for proper assembly
  • your U1 converter needs proper low-impedance ceramic capacitors. Electrolytic cap is not suitable as an input cap for the converter
  • rearrange your diodes (u4, u6 – change the desingators) to make shortest loops to GND of input caps
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I was thinking this, but on the other hand, the price difference isn’t huge so I didn’t think it was a major issue. I agree that it should be quite doable on a double sided board.

A lot of excellent suggestions. I’ll do my best to implement what I can.

My plan was to have just a few of the parts added by the fab house. I am comfortable enough with smd soldering that I planned to do most of it myself. I put the caps and resistors on the back as I like the cleaner look of it. That is also why most of the traces are routed on the inner layers, just to hide them from view.

As for the TO-220, I have not been able to locate an SMD alternative.

Yes, the boxes around the different “groups” is quite abit of a pain, but I like them.

The back layer is a GND plane, or am I missing something?

the U designation on the U4 & U6 was assigned by whoever built the symbol. I got that from SnapEDA, I believe.

I was using that D pak schottky diode as it was what was suggested by the TI Power Designer I used to design the buck converters. And as designed it’s a 2.5A buck converter. (I found an alternative)

Also, the Electrolytic Cap on the buck converter was suggested by the TI Power Designer.

I had originally designed this on 2 layers but wanted a cleaner look so went with 4 to stuff the majority of the traces inside where they will not be seen. I like that look, if it’s a problem other than design complexity, I’d change it.

I have made some changes already to the buck converters while reading this, will upload those changes and some others later after work.

Thanks for your input so far, it’s very helpful.

The “SMT” variant of a TO220 is TO263. It has the tab cut of and the pis bent.

If you want to use TO220 you can use the horizontal variant and lay it flat on the PCB.
But it’s just a P-MOSfet, how much current must it conduct?

I would suggest to add a GND and a VCC pin to the ADC connector. Depending on what you will connect there, VCC could be good as excitation voltage or as a rail for protection diodes.
Also, consider adding a low pass filter as shown in the datasheet. It is not mandatory but it may help for a stable reading.

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There is plenty of room to lay it down, I may do that… but I’m also looking for an SMT variant of that particular part.

I’ll either do that or change the connector to a pin connector like I’m using for my extra grounds and 5v. I really don’t have a definite plan for that ADC yet.

It is not full (continuous) GND plane.

The standard is to use top and bottom for connections and internal layers for GND and VCC planes.
I would put all SMD parts at top and route most of tracks at top (no vias needed). That allows to make GND as continuous as possible.

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If I see it right, each current flowing from the left half of the board to the right has to go back below J8. This gives big current loops emitting EMI and of course also being susceptible for EMI. The thought “I don’t care for emmissions” is not the whole truth. If it emmits, it also receives and it will be sensible for radiation like the ones of a switching refrigerator or neon bulb.

If you are going to be doing any hand assembly (as you mention that you might) and don’t have reference designators printed on your board, check out the Interactive BOM plugin. This creates a dynamic HTML file that you can load into (most) any modern browser. From this file you can easily find where different components are on your board. Check out the demo page that is also linked in the GitHub readme.

FWIW, I also use this plugin and I do have reference designators printed on my boards.:wink:

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I use the InteractiveHtmlBom already. Great tool.

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Agree with all the above .
Another reason for having your tracks on the outside of the board is if you have made any mistakes or need to change the routing for any other reason it is easier if you can get to the tracks. If they are all on inner layers and you decide you need to cut a connection it can become very difficult as you cant physically cut it…
If you want to hide the traces that much use either a black or white resist as they hide the tracks more than standard green resist.

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I spent time last night and this AM moving things around per some of the suggestions here, however, I’m not going to be able to move all traces to the top or bottom layers.

I realize mistakes can be made, but I feel its better practice to make sure it’s right before sending to fab.

Test and retest… I’m not interested in cutting traces and trying to fix it on the board…

Often moving components around will help with routing, and your PCB looks simple enough that it should be possible to route just on the outer layers.

But of course it’s no problem to put a few traces (partially) on the inner layers. Just make sure to make them as short as possible and arrange them in a way that they don’t create large continuous disconnects on the plane.

And if possible use only one inner layer for traces, so you have at least one continuous ground plane.

Well nobody is, but sometimes you still make a mistake and you PCB doesn’t work, and then you might need to cut traces and wire things differently to find/workaround the problem.

I recently forgot a pull-up-resistor, which I could luckily just solder on the pads, to confirm that that was the only issue. Without my hack, I wouldn’t be sure that the missing resistor really was the (only) issue.

And if your design contains lots of SMD stuff or high-speed components, it’s often not feasible to test your design on a breadboard beforehand.

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