Pin numbering order and distribution, just some opinions

I have a question on pin numbering order, as per Library Convention S4.2.2: why is order from top to bottom?
Maybe in some electronic schematic rules there’s a common recommendation that I’ve never heard of (or I don’t remember), and someone can address me to that.

I find it quite awkward, you know, I’ve always been counting floors in a building with positive numbers ground to top. The same is natural to me with cartesian axes.
The only reference that comes easy to my mind for top to bottom positive counting are pixel coordinates on screen/DIB/BMP files. That belongs to older CRT screens, and their line scanning order, I can understand it.
There are some other awkward counting standards, like Xilinx’s own reversed bit ordering – and that is even more strange, from a company that should know counter bits can be counted with powers of two…


Over time I’ve also shared schematics with many different designers that agreed on another convention, that I understand it’s hard to make a rule of.
With relevant and complex IC parts, let’s say over 20 pins, and physically arranged in two lines (like SOIC) or on four sides (like QFP, QFN, etc.), we kept distribution of schematic pins as in the physical package. That helped a lot verifying a board under test or a PCB routing with schematic.
Any opinion on this?

But you write from top left to bottom left.
A spreadsheet also starts form top left and increments towards bottom right.

And all standards regarding schematic symbols suggest that ordering. IEC, IEEE, DIN, …
So this convention is quite widespread.

There was a lengthy discussion about that recently. So you are definitely not alone in that.
However most complex schematics benefit greatly from organizing pins by functional groups. This is what is used by the official lib.

The reasoning behind that is that the schematic should in an understandable way communicate the function of a circuit. (This is made easier by organizing pins by function)

The schematic is not in any way intended to communicate the physical side of the circuit. (That’s what the board file is for.)

For debugging we will get cross highlighting between schematic and pcb_new in kicad 5. (Meaning you can highlight a signal in eeschema and have it also highlighted in pcb_new)

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That’s one metaphor. As you may know there are 3 parts to an analogy 1) structural consistence 2) semantic equivalence and 3) essential similarity. All 3 parts are subjective. Describing a symbol for an electronic component as “like a building” isn’t the first comparison I would reach for.

In all written languages I know, the order is top down. That seems like the logical order to me. Ultimately, there are many possibilities, we need to pick one.

That is not something I like, but I understand the reasons. For packages with many pins, it becomes less desirable for clarity of the schematic, but more desirable for PCB layout. There is not really a way to resolve that, but pin swapping (planned for future) may help.

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Maybe it’s just that some of the first schematic design entry I used thirty years ago adopted that convention, so it appeared natural to me, as in the two mentioned examples.
I’m quite open to adopt good reasons (unless they’re better than my own good reasons, of course).

Oh, and by the way, the building example came from a mental image of a store department, or an elevator panel:
4. Useless things
3. Men’s apparel
2. Children clothes

  1. Women’s department
    (looks like us men buy clothes very rarely)

Correct. Almost: left apart graphs, so calculus and math are languages apparently ordering things differently, and oops… these are the languages for which “order” makes sense :wink:
(Yes, this was intentional play: just to throw in some silly phylosophy)

Oh don’t worry, we’ll soon need to use BGAs for almost everything, so my preference for 1:1 in schematic and PCB layout is already obsolete :smiley:

Order is also quite important in natural languages. In maths, matrices are written with (1,1) at the top left. A cartesian graph is no more like an electronic symbol than is a building.

Tbh, I find your reasoning quite spurious and bordering on trolling. This is a pointless thread going nowhere.

I just read it all, and it drifted to anger and a bad end, so I’m very sorry I recalled it.
Forget my original question, thanks.

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