On one of my project I already made with 6.0.11 and it was without errors and even manufactured without errors, once imported into the 7.0.0 I got the errors you see her and 109 warnings.
As I said: in the 6.0.11 not errors/warnings detected.
I manufactured already 32 PCBs and are perfectly working.
Now: why dos the 7.0.0 detecting these errors?
To any major update I have to expect tahta ll projects are screwed-up?
I believe the text height constraint is new in 7.0.0 for work with a variety of fonts. The default value may be conservative, so if you know your manufacturer can make the board as is you can probably change the constraint value to the current text height without worry. You can also ignore that warning if youâve already had the board built.
The library check errors might signify that the library provided footprint has changed. Again, if the existing footprint worked for you, you can safely ignore the warning.
I updated my message adding some screenshots because libraries are not changed (so far I know)
Itâs screwing up all projects in this way.
What are the thermal relief violations? Since when there is this? I never see it before and all the PCBs I have made are working excellently and SMDs are correctly mounted
(Apologies if you already know this)
Thermal relief in general refers to ways of reducing contact between solderable pads/holes and large copper planes/zones that might make it hard to get the solder up to temperature for reflow. In this case I imagine KiCad is trying to add at least 2 spokes around a pad and canât due to some other constraint. Maybe there is a trace of another net routed 270 degrees around a hole that should touch a zone and KiCad can only fit in one spoke to make them connected. The default zone constraints can be found in File > Board Setup > Constraints. You can (probably) safely change âMin thermal relief spoke countâ to 1.
No, this is strange. Look at the error message: it says there is actual 1 connection, but there are 3.
In the moment I have no idea what happens there.
That does look rather suspicious to me. I just had a quick glance through the existing issues and I didnât see anything similar, so it may be worth starting an issue on Gitlab (About KiCad > Report Bug) and uploading the project if possible. If you canât upload the project publicly, there is an option for confidential bugs that only developers can see.
I do not see the solder mask here, but as this is a solder jumper it very well might bridge net âŚJP3-A and âŚJP3-B.
You can set this check to ignore in Board Setup â Violation Severity
[EDIT] Why is it checked in the first place? In high density professional boards quality policies often call for a soldermask between pads like so:
so this DFM (design for manfacturing) check was introduced. In my understanding, that is (Iâm no dev).
there is a solder jumper indeed. but on the 6.0.11 everything worked fine.
There are too many problems with the 7.0.0 for me, in this moment. Itâs very critical to work with.
I did notice that:
when I move the lines of the Edge Cyut layer, it doesnât appear any-longer the circle that indicates the 2 lines are correctly overlapping the vertexes
When you try to design a route, it doesnât hang any-longer to the pad or the other route but to the center of the component
I canât reopen the project so n 6.0.11 because now itâs saved under 7.0.0
But I see where you are heading. Yes, there were many changes in UI, additional functions, additional checks. Whether they are perceived as enhancements or as detrimental lies - as so often - in the eye of the beholder.
It is already to Always. But not always it appears that circle
The issue is: when the circle doesnât appear, KiCAD is considering the 2 lines not coincident than the PCB Contour is broken âŚ
For whatever it is worth, I couldnât replicate either issue with a minimal example. Thermal relief spokes are being counted properly and I get a proper snap on the edge cuts lines. Not to say that these arenât real bugs, just that they arenât universal. Iâd really suggest making issues for both of them with the project attached (since perhaps it may be related to the upgrade from 6.0.11 to 7.0.0?)
Or @tormyvancool could send a project to me on PM. I am prepared to sign any NDA .
Honestly I do not think those are bugs but I can be wrong obviously. I remember I had something with those cycles myself and I solved it without bug report, but no idea how that went.