PCB DRC test headache

Hi
After a difficult design process I finally enjoyed arriving to the stage of footprints placement and manual routing. But when I tried to perform the DRC test I fell into the core of a conundrum. The more than 30 pointers acted as a swarm of arrow hitting my body. Almost all the errors are commented with “error:front solder mask aperture bridges items with different nets”. Despite my search for the meaning of that sentence I am not able to understand what it is about. And no idea about the solution.
thanks in advance to the saviour.

So you have your solder mask, a mask that describes where your solder resist will not be placed, e.g. over a pad (you need to be able to solder to a pad), and that mask overlaps items (pads or tracks) that belong to different nets.

Yes.
Basically, things are too close together.

Yes. Ppractically what should I do as a beginner? I did not set any dimension to solder masks, where and how should I change things?

It would help if you posted some images showing the warnings.
But, there are three things you can do: ignore the warnings, move items away from each other, reduce soldermask expansion.

The warning is not a fatal error. It’s there to let you know that the possibility of solder bridging is increased during assembly.

Ciao
I have made the decision to ignore all the DRC messages about front solder mask aperture bridges.
Now I am generating the Gerber files and we shall see.
Thanks for help.

If you have ICs with 0.4mm pitch then bridging several pads by soldermask can be ‘by design’.
If you have only ICs with 0.5mm (or bigger) pitch than it rather should not have happened.
Without seeing your PCB trying to find problem source it’s fortune telling with tea leaves.

I updated the FAQ article with hopefully a more prominent example and explanation.

Normal web search gives links to many helpful threads in this forum, I wonder if you tried that.


I am trying to add the jpg image of my pcb layout, hoping I will succeed.
My pads are placed at the standard pitch of 2.54 mm (100 mils). I am really surpriced to receive so many errors at the points where tracks connect to pads.

Wat are you making? The pin numbers in your pads are very big and I don’t see net names in them. Other pad don’t show their pad numbers at all. This is quite unusual but we can’t see what is going on under the hood from a screenshot.

This is perplexing indeed. I suspect there’s something more fundamental going on. It’s as if you have bypassed the schematic, routed without on the fly DRC and suppressed other DRC errors.

If possible, please zip the project and attach it here.

For me it looks like you missed something in:

Read it once more.

When you were routing tracks at PCB have you followed connection lines you get after updating PCB from schematic?

Width of tracks is 0.2 mm escluding ground and Vcc supplies which are 0.4 mm.
I thank the kind persons who are trying to help me. Now I know what is solder resist and aperture. Before starting my miniboard design I had to search for for ultra low power components and check them for evanescent current consumption of less than half microampere. I understand that my kicad problems might be boring for you, but I ask you to appreciate my full determination to reach the end of my project. Also considering that I am an Italian boy whose maturity I like here to define for privacy reasons as:log3(myage-5)=16˄1/2.
I hope that the image will help you to discover the origin of the strange errors. thanks and regards.

No. Images don’t help here. You have to zip up and post the whole project and post it so we can see how the things in it are defined and what the cause is of the DRC violations. It’s a simple project, so if you just zip up the project files (Schematic, PCB, .PRO and .PRL) then it’s probably also smaller then the screenshots you posted.

Posting the list of DRC violations would also help.

That’s not needed, although sometimes it may reveal something about why something can’t be seen etc.

Your Schematic and PCB do not match . . . U6 on the schematic ? where is it on the PCB ? Q1 on the PCB ? where is it on the schematic ?

I’m guessing you created these in isolation from each other and not from the KiCad Project ?

I have expected exactly the same when I was writing:

Hi Raptor UK
You are right, there were a few discrepancies between scheme and PCB. These were due to some changes I made on the symbols and footprints which obliged me to replace the corresponding elements but forgot to check the new annotations. But I assure you that I created first the schematic which has always been my reference and on its basis I created the PCB layout by routing with the tool “route single track” closely following the connections in the schematic. The electronic schematic has been by myself already realized in the hand-wired form and performs perfectly. I now resend here the updated schematic Anyway after running DRC on PCB with the updated schematic the diagnosis is exactly the same. Paulvdh asked me to send the zipped copy of my project together with the error list . But, if I understand well, in a subsequent post he consider them to be no more necessary. I can send them after I understand how to add files to the posts.