PCB doesn't look right

This is the schematic for my project

When I made a PCB from it I got

On close inspection I find C4 in the lower right corner is not connected to the nRF24L01* breakout but, instead to the BARO breakout. How could I have made that happen?

Another thing is the big black hole in the middle. How is that not red with the traces delineated?

But it is. It is connected to the same nets (3V3 & GND).

There is not path from the outer area of the zone and the middle area of the zone. So if the middle part was filled it would just be an isolated bunch of copper. Move some tracks to allow a path into the middle area and it will fill.

C4 should have a polarized footprint, I don’t see any indication of polarity.

Also, I would move the barrel jack so that it is at the edge of the board and there is no issue with the body of the plug clearing the PCB.

And by the way, good job! A few days ago I would not have expected you to be this far along by now. :wink:


1.21GW is on point with his suggestions. How are you planning on having this made? OSHPark? [EDIT] Oh, probably not OSHPark, now that I see you are in Perth…[/EDIT] If so, there is no extra cost for two layers over one layer. That ground trace isn’t needed because it is duplicated by the ground plane copper fill, so get rid of it. I’d then move all the other traces to the bottom of the board for two reasons: That will allow the ground fill to completely flood the top of the board providing grounding and good return paths over the entire board. And, if you find you need to make a change all the traces will be available (i.e. not hidden under components) for cutting and/or scraping off mask and soldering bodge wires.

Your issue with C4 “not being connected” to the nRF breakout is because you chose to put it far away from the nRF module. :wink: You should try to get the bypass capacitors as close to the power pins that they are providing filtering for as you reasonably can. i.e. C4 over on the other side of the nRF with C4-1 (that is shorthand for C4 pin 1) close to RC1-2. Push the baro down a little to fit C3-1 between S1-1 and IC1-9. Move C5 so C5-1 is closer to S2-1. C2 down so C2-1 is closer to REG1-1. C1 is probably fine where it is.

I agree with 1.21GW, it is looking really good for a first board. You should feel proud. :slight_smile: Then fix the issues. :wink:

Thanks. :grin:

PCBNew does not share your imagination, it only cares that a component is connected to the correct nets. The “design” of the board is up to you. You need to place components appropriately according to your design. The same goes for tracks, it’s up to you to determine that the placement of a track is not going to interfere with another track or component. A lot of people don’t seem to realize that there is a lot more to electronics and PCB design than just “connecting the dots”.

That doesn’t mean there isn’t a way to do it. :wink: But also consider the advice of @SembazuruCDE to make a double sided board.

No, C1 is the only other polarized cap. The others, although you have used a polarized symbol on the schematic, are not polarized.

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What makes you think that C3 and C5 are not polarzed capacitors?

That would be a bad idea. You should have paid more attention to the last sentence in the first paragraph of my last post. :wink:

I did pay attention to that sentence and that is why I am trying to gain some understanding of this issue of multiple capacitors.

Why is is a bad idea? When I tried out this curcuitry on a breadboard it was easy enough to associate individual capacitors to the power supply to each breakout. With this great red blur common GND there is no such distinction. As we see above, there is no physical association between C4 and RC1. Since C1 (22uF) also sits between GND and 3.3V should its capacitance not cover C3, C4 and C5 ?

BTW: you didn’t say why you think C3 and C5 are not polarized capacitors.

I ask these questions because I am trying to find out what :… is a lot more to electronics and PCB design than just “connecting the dots”. :smile:

The “association” is the part that is currently missing from your PCB. If, according to your “design”, they are intended to be physically associated with each other then it is up to you to lay them out accordingly. Their association is determined by their proximity to one another and like wise, how they are connected to each other. So if your design intended C4 to be directly connected to RC1 then it should be located as close as possible to the pins of RC1. Just being connected to the correct nets is not always enough, but it is all KiCad requires.

C2, C3, and C5 are not intended to provide any “bulk” capacitance, they are decoupling capacitors. This is suggested by their small values. Ceramic capacitors are more suited to this task than electrolytics (polarized), cheaper too.

Having said that, your circuit is trivial enough that you would probably get away with poorly placed, or even missing, capacitors and it would still “work”. How reliably is another issue.

You would be better off reading a few books on the subject. The subject of electronics and PCB design can generally be further divided into three subcategories, digital electronics, analog electronics, and RF electronics. A good book on general electronics would be a good place to start but then you would likely want to concentrate more on one of those three areas. It is sometimes quite surprising how those three areas of electronics differ. For instance, when designing RF circuits, particularly microwave circuits, it is possible to have components on the schematic, such as capacitors and inductors, but on the PCB they are nothing but patterns in the copper. Entire filters can be made from nothing but copper patterns on the PCB.

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And let’s not forget about the rounded corners vs. right angle discussion… :slight_smile:

Wait a sec, let me find my smith chart. :laughing:

As your using modules that are likely to have decoupling capacitors built in for the arduino and the RF tranciever, you likely would not require capacitors for these chips

1.21’s recommendations come from best practices, If something sends fast digital signals, It generally draws extra current while doing so, so having a capacitor, even a small one near the device reduces how much the supply can dip,

Every trace on a PCB is filled with parasitic components, the most obvious is it has resistance, it also has inductance and a touch of capacitance

The inductance is the main problem, as the frequency of the current demand increases (edges switch faster), the effective supply resistance at that moment for the chip becomes higher (Impedance)

By having a capacitor very close to the supply pins of the IC with the fast digital signals, It keeps the Impedance of the supply rails close to 0.

C1 / C2 are likely required to keep the voltage regulator happy, Its datahseet will likely say the same.

Just like you placed C4 near the nRF24L01 in the SCH, you also need to manually place C4 near the nRF24L01 on the PCB itself.

Then, it can behave more closely to your imagination…

KiCad removes floating (not connected) copper, if you want pour to pour into empty areas, it needs to have a path to connect to other GND.
You can do that with some fine tuning of the clearance values, so copper can pour between the pins.

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Go ahead and ask your questions. Ask respectfully, and showing that you have put some effort into finding an answer on your own. (“Initiative” is a highly admired trait on this, and many similar, technical forums.)

It is true that many of us acquired knowledge of electronics from textbooks, professional articles, or in formal classroom settings. Many of our superannuated cerebrums only vaguely recall all the faces that looked over our shoulders through the years, offering suggestions and critiques. And we have forgotten the quantum leaps of insight that happened in the hour or two after we (or somebody nearby) vocalized surprise with a phrase such as, "Hey guys! I never noticed this before . . . ".

Jim Williams , one of the foremost analog circuit engineers of our generation, was an autodidact. That’s not the same as saying that he didn’t learn from books, but it underscores that there are many learning styles among people. The frontispiece to Williams’ book “The Art and Science of Analog Circuit Design” is the quotation,
"MIT building 20 at 3:00 A.M.
Tek 547, pizza breadboard.
That’s education. "
The first essay, “The Importance of Fixing”, gives insight to the significance of that quotation, as well as asking questions, and learning by studying others’ work.


Of course I was not trying to discourage him from asking questions, but the degree of knowledge to be gained from reading a good book or two vastly exceeds what can be conveyed in a forum such as this. Not to mention the fact that in a forum like this each of his questions is likely to attract half a dozen different answers. :wink: Although I know good books are expensive here in Australia. My current list of books to purchase contains about 6 books totaling nearly $1000 AUD. Which reminds me, I should hurry up and order them before the end of the financial year. (Which here in AU is June 30) :slightly_smiling_face:

I don’t see how being self-taught at all suggests he didn’t read books, on the contrary it does suggest he probably read many.

I agree that the best education is in the form of “hands-on” experience, and not just in engineering fields.

I strongly suggest autodidact does mean reading recommended textbooks, if you attempt to come up with your own theory of electricity you might end up like this guy

I couldn’t even watch the whole thing! There is a plethora of videos like this on YouTube covering all sorts of subjects from free energy to flat earth. The most entertaining part is always how confident these people are when they are saying the most ridiculous things.

Edit: By the way, thanks @bobc for posting that YouTube video. Part way through that video my attention was drawn to another, more interesting, video. Than after that, another. Then another. An hour later I was watching some guy shoot his old truck with a “World of Tanks” tank. Now, aside from the lost hour, YouTube thinks I’m only interested in videos with guns and tanks. :angry:

Please remove that video.
Once youtube thinks you are interested in that garbage, it will keep “suggesting” similar crap for years on end.

Back on the original track :rofl: I had another look at the documentation I have for the breakouts I am using. There was no suggestion that either the DHT22 or the BARO need decoupling capacitors, although there is nothing specific that says they are part of the breakout. Leaving these two capacitors out simplifies things a little

from which I get

That’s a lot tidier but there is still a matter of big black holes :slightly_frowning_face:

The red infill is GND. I have read somewhere that it is good practice to use wider traces and clearances for power (and ground). I suspect that that is why the red infill can’t squeeze between pads at 0.25 spacing. What width and clearances are appropriate for PWR and GND?

BTW: I just spotted that that infill is for PWR not GND. Hrrmphh! :tired_face: I wonder how that happened! However, the question still stands.

Why does that bother you?