I have designed a prototype board where part of it is isolated. I have a separate ISO_GND pour on all six layers. The board works fine (stackup: sig, gnd, pwr, sig, gnd, sig). The ground pours are separated by a gap of 0.5mm.
I now have to allow this board to be manufactured in a lower-cost non-iso version so I need to design this option in. I plan to add 0 Ohm resistors connecting ISO_GND to GND and for the signals that cross the gap.
My concern is the signal return ground paths. What is the best strategy? Adding lots of 0 Ohm resistors bridging the gap at regular intervals along the gap? Is there a rule of thumb? Or do I only need to add a 0 Ohm ground resistor next to each 0 Ohm signal resistor where the signal crosses the gap? Or something else?
agreed.
a “low cost” solution would involve replacing the isolators (optos, digital isolators) with traces and ensuring the GND’s are connected.
I would be CAREFUL of using a single 0R resistor to link the grounds as the signal return curent for ALL signals would be via this one point… VERY bad for cross-coupling as it then fans out …
I personally would use a load of net-ties or jumpers for the signals and then make sure you have several gnd links near each signal (ideally interwoven…)
This means you don’t have any 0R resistors to source, can revert back to isolated etc… you are talking about 0.5mm creepage so you are not after HV separation are more than likely just a gnd-loop breakage…
If you have isolated ground there should be no tracks crossing the gap, I think.
If you want to add a serie of 0R linking grounds together than may be they should simply be one GND.
Have you read:
Thanks for the replies. I want to be able to choose between isolated and non-isolated at build time, then it cannot be changed. This is what I am currently thinking:
You didn’t said it previously. I understood that you are designing the new PCB for not isolated version only.
According to your picture.
I understand that you place 0Rs and you have not isolated version (GND and ISOGND are shorted and signal is run through R0).
But I don’t understand how you assemble on this PCB isolated version.
Not placing 0Rs connecting GNDs - ok they are isolated.
Not placing 0Rs at signal - ok it is isolated but rather don’t transmit any information between isolated parts.
I agree it wasnt mentioned but I got the intent. While I don’t do it for “low cost” I do do this sometimes to validate a CM issue or a chip issue. Typically I use tinned copper wire across teh pads but that is because it is a test, in this instance the JUMPER is the best course or action (or a 0r pad)
I stand by what I said… more gnd will be required that has probably been thought of as it is less todo with current handling and more todo with the closest return path to minimise inductance. HONESTLY I would put this bypass 0R for return on the bottom of the card - current is lazy and wants to find the path of least impedance. Low-freq will tak the path of lowest resistance while HF will take the path of lowest impedance.
OK.
In not isolated version to have a path for return current I would also think of connecting GNDs with 0R just near each signal crosses a gap. So as many 0Rs for connecting GNDs as signal lines crossing the gap (I would replace these 2 0Rs connecting GNDs at your picture with one). If several signal lines would cross gap together the one 0R can be for all of them.
But wouldn’t it be just simpler to have two PCBs. One for isolated and one for not isolated version.
I would agree with this, but since I work somewhere which has obnoxious configuration… multiple CCA can cause other considerations. I do see the “elegance” of a single PWB but then you have a configuration nightmare w.r.t. population.
