Ngspice Simulator Help: TLV1805 Comparator

I’ve been trying to get the Ngspice simulator in KiCad working with a simple circuit that contains two TLV1805 comparators, using the Pspice model provided by Texas Instruments. I’ve created the .spiceinit file in my User directory on Windows to enable pspice compatibility, and followed instructions on the NgSpice website for installing NgSpice 31 on KiCAD. I’ve also created a new symbol with the correct pin order for the TLV1805 that matches its spice model (the pin order is different on TI’s spice model than on he physical package of the TLV1805).

I’ve attached a .zip of the project file in question. The circuit is a simplified part of a larger system that I’ve isolated for simulation with KiCad. The schematic consists of a voltage source V1 which provides a constant 12V to power logic, and an input voltage source V2 which provides a brief 80V pulse on the V_LOAD network. This network passes through a voltage divider and enters the TLV1805, which compares it to a 6V reference voltage divider. If the divided V_LOAD signal is larger than 6V, the comparator U1A should output a HI signal, which gets fed into the gate driver U3. U3 drives a peak detector circuit with a bleed resistor, which should create a HI signal that gradually decreases to 0V as the peak detector capacitor is discharged by bleed resistor R6. This peak detector voltage value is fed into another comparator U2.

When I run the simulation, I can see that the divided V_LOAD signal performs its pulse as expected, but things get really weird around the first comparator U1; U1’s output immediately jumps to the positive rail at the start of the simulation, and stays there. I’ve double checked my spice model pinouts, and haven’t found any more detailed info from TI about the TLV1805 model and how to use it. If anyone with more experience might be able to tell me what’s wrong or point me in the right direction here, I’d really appreciate it! The project file is attached as a .zip, with model files included. KiCad version is appended last.

I should also mention that I’ve built the first chunk of this circuit, including the V_LOAD network, the input voltage divider, U1, and U3, in real life, and it works as expected. I’m pretty sure that the issues I’m having are a function of my own incompetence or some weirdness that I don’t understand about KiCad / NgSpice. Any and all advice is greatly appreciated!

power_eater_spice.zip (34.2 KB)

Application: Eeschema
Version: (5.1.4)-1, release build
Libraries:
wxWidgets 3.0.4
libcurl/7.61.1 OpenSSL/1.1.1 (WinSSL) zlib/1.2.11 brotli/1.0.6 libidn2/2.0.5 libpsl/0.20.2 (+libidn2/2.0.5) nghttp2/1.34.0
Platform: Windows 8 (build 9200), 64-bit edition, 64 bit, Little endian, wxMSW
Build Info:
wxWidgets: 3.0.4 (wchar_t,wx containers,compatible with 2.8)
Boost: 1.68.0
OpenCASCADE Community Edition: 6.9.1
Curl: 7.61.1
Compiler: GCC 8.2.0 with C++ ABI 1013

Build settings:
USE_WX_GRAPHICS_CONTEXT=OFF
USE_WX_OVERLAY=OFF
KICAD_SCRIPTING=ON
KICAD_SCRIPTING_MODULES=ON
KICAD_SCRIPTING_PYTHON3=OFF
KICAD_SCRIPTING_WXPYTHON=ON
KICAD_SCRIPTING_WXPYTHON_PHOENIX=OFF
KICAD_SCRIPTING_ACTION_MENU=ON
BUILD_GITHUB_PLUGIN=ON
KICAD_USE_OCE=ON
KICAD_USE_OCC=OFF
KICAD_SPICE=ON

PWL: This is not delta time, but absolute time, so has to be pwl(0 0 1.6 0 3.1 80 3.6 80 4 0), (at least my guess). And you have to start the sequence with time 0 (and value 0 probably)

The Spice model for the TLV1805 has to be added to each subunit U2a and U2b, U1a and U1b, explicitely.

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Thank you @holger! The issue was that I didin’t have the spice model for the TLV1805 added to the subunits. You’ve made my day–I hope you have a fantastic weekend!

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Hey, @holger. Speaking of delta-time, does ngspice have support for delta-time for PWL? For example, in LTspice you can put the plus-sign (+) in front of the time value to make it relative to the previous time step. This wasn’t documented in LTspice and I had to learn it from Mike Engelhardt directly during one of his live tutorials. Just wondering if the same thing is also possible in ngspice, since it’s one of my favorite features.

Unfortunately this feature is not available.

Ah, dang. What about referencing external text files with comma or tab separated time/value pairs?

It is called ‘file source’. See manual, chapt. 12.2.8. An example is available at https://sourceforge.net/p/ngspice/ngspice/ci/master/tree/examples/xspice/filesource/. To make use of this in eeschema, you have to define a sub circuit including this XSPICE a-source.