Newbe wants to simulate a comparator circuit. Mint linux, KiCad 5.1 NgSpice version unknown?

Hello all,

Running Mint Linux and KiCad 5.1.2-f72e74a~ubuntu16.04.1

As I am a newbee to NgSpice and not that experienced with KiCad I run into errors an trouble. With simulating a comparator circuit. What I did was the following:

I installed the latest version of KiCad like this:

This seems to work fine and KiCad looks great! I got some errors with simulation of nGSpice using a comparator so I thought maybe I can try a newer version of NgSpice Then I tried this:

http://ngspice.sourceforge.net/ngspice-eeschema.html
and the above site links to this one, which I also did:

But still errors. When I try the following command in the console

ngspice -v
the result is:
ngspice compiled from ngspice revision 26

So there are a few possibilities:

(1) there is still the old version providing me with the version number and the new version doing noting
(2)the new version is used by KiCad (do not know how to check this) and the old version of NgSpice is reacting in my console command telling me the old version
(3)Well I am a newbee and did not figure it out

I tried to download different models of opamps. tried to get rid of all the unnecessary parts and tried to find all the errors. Errors I can see but am unable to understand are the following:

when doing the error check in KiCad:

ERC report (Wed 29 May 2019 10:37:06 PM CEST, Encoding UTF8 )

***** Sheet /
ErrType(3): Pin connected to other pins, but not driven by any pin
@(251,46 mm, 57,15 mm): Pin 1 (Power input) of component #GND0101 is not driven (Net 1).
ErrType(3): Pin connected to other pins, but not driven by any pin
@(35,56 mm, 40,64 mm): Pin 1 (Input) of component Vsig1 is not driven (Net 5).
ErrType(3): Pin connected to other pins, but not driven by any pin
@(245,11 mm, 76,20 mm): Pin 2 (Input) of component Vcc1 is not driven (Net 9).
ErrType(3): Pin connected to other pins, but not driven by any pin
@(165,10 mm, 50,80 mm): Pin 4 (Power input) of component U2 is not driven (Net 10).

** ERC messages: 4 Errors 0 Warnings 4

When doing a simulation in nGSpice:

Circuit: KiCad schematic
Error on line 4 :
vu2 net-r3-pad1 net-r4-pad1 net-r8-pad2 net-u1-pad4 net-u1-pad5 opamp
unknown parameter (net)
Error on line 5 :
vu1 net-u1-pad1 net-r1-pad1 net-r1-pad1 net-u1-pad4 net-u1-pad5 opamp
unknown parameter (net)
Background thread stopped with timeout = 0
Doing analysis at TEMP = 27,000000 and TNOM = 27,000000
Warning: vu1: has no value, DC 0 assumed
Warning: vu2: has no value, DC 0 assumed
Warning: vsig1: no DC value, transient time 0 value used
Initial Transient Solution

Node Voltage


net-u1-pad1 1
net-r3-pad1 1,00962
net-r4-pad1 1,00962
net-r1-pad1 1
net-r8-pad2 0
net-r2-pad1 1,01923
net-u1-pad5 -5
net-u1-pad4 25
net-r2-pad2 3
vref1#branch -0,0198077
vcc2#branch 0
vcc1#branch 0
vu1#branch -0,00961438
vu2#branch 0,00961538
vsig1#branch 0,00961438
Reference value : 0,00000e+00
No. of Data Rows : 306

here is a picture of the scematic:

I hope someone can help me out. As I am a newbee I probably did not tell you guys all. If so please ask!

thanks for the help!

Many, many questions in a single post :slight_smile:

About the version:
KiCad is not using the console ngspice, but a shared library that cannot be accessed from outside.

Your command
ngspice -v
just gets an answer from an (old) ngspice version residing in your system.

To get the ngspice version from inside KiCad, you have to do a trick:

Open eeschema window.
Edit a text box (T from the right column) and type in the following:

.op
.control
version
.endc

.op just gives a simulation command, the .control section will return the ngspice version.
Now do Tools–>Simulator–>Run Simulation
and you will see the ngspice version.

1 Like

The ngspice error message tells me that there is something wrong with your circuit. The instance line of an OpAmp, whose model is in a subcircuit, cannot start with a V, but has to start with an X.

Why not following the tutorial from the ngspice web site you have already cited and do it step by step?

Oh, man. That’s a solid trick for getting the version number. Thanks for sharing!

I agree with @holger:

I cannot tell from the schematic you included, because I cannot zoom in, but judging from what I can see, my guess would be that the GND’s are not properly connected to Vlsg1, R1, Vref1, R7, R8 and Vcc2. You would have to zoom in to be able to see.

Summary: You are looking in the wrong direction to solve this. This is not a problem in ngspice and the combination with EEsched.
Hint: EEsched has a button ‘Perform electrical rules check’ (the ladybug symbol) that might help you find the missing connections.

1 Like

Yes !!! thank you soo much! Now I am like really happy! The output is:

Circuit: KiCad schematic


** ngspice-30 : Circuit level simulation program
** The U. C. Berkeley CAD Group
** Copyright 1985-1994, Regents of the University of California.
** Please get your ngspice manual from http://ngspice.sourceforge.net/docs.html
** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html
** Creation Date: Wed Feb 27 13:04:55 UTC 2019


Doing analysis at TEMP = 27,000000 and TNOM = 27,000000
Reference value : 0,00000e+00
No. of Data Rows : 1

Sorry for the late reaction did not have got time before…

It seems you are right! I did try the LF356.mod from: “4) Inverting amplifier with OpAmp” of the example in the site:

http://ngspice.sourceforge.net/ngspice-eeschema.html

it seems to work although the opamp is slow the output shows KiCad in combination with NgSpice is working. There is one thing I do not understand though I will add it to the reply of mifi.

Here you can find the new scematic:

Here you can find the output of the simulation:

Thanks mifi,

it seems you guys are completely right! one thing I find strange though is I get warnings which I do not understand when doing the electrical rules check (the lady bug icon)

ERC report (Fri 31 May 2019 12:50:28 PM CEST, Encoding UTF8 )

***** Sheet /
ErrType(3): Pin connected to other pins, but not driven by any pin
@(80,01 mm, 81,28 mm): Pin 3 (Input) of component U1 is not driven (Net 1).
ErrType(3): Pin connected to other pins, but not driven by any pin
@(76,20 mm, 50,80 mm): Pin 1 (Power input) of component #GND02 is not driven (Net 3).
ErrType(3): Pin connected to other pins, but not driven by any pin
@(85,09 mm, 91,44 mm): Pin 4 (Power input) of component U1 is not driven (Net 13).
ErrType(3): Pin connected to other pins, but not driven by any pin
@(85,09 mm, 76,20 mm): Pin 7 (Power input) of component U1 is not driven (Net 14).

** ERC messages: 4 Errors 0 Warnings 4

I did remove the wire from Pin 4 of U1 and draw it over again. Now the warning is disappeared from U1 and the green warning arrow is located at pin 4 of U7. Can someone please explain this?

I can not find the warnings in the output of NgSpice there is only one waring there:
Warning: v1: no DC value, transient time 0 value used
Is this a Bad thing?

the complete NgSpice output can be find here:
Circuit: KiCad schematic
Background thread stopped with timeout = 0
Reducing trtol to 1 for xspice ‘A’ devices
Doing analysis at TEMP = 27,000000 and TNOM = 27,000000
Warning: v1: no DC value, transient time 0 value used
Initial Transient Solution

Node Voltage


net-r1-pad1 1,5
net-r1-pad2 3
net-u1-pad7 25
net-u1-pad4 -5
net-u1-pad3 1
net-r3-pad2 22,6262
net-u1-pad2 1,00296
xu1.3 1,00148
xu1.4 1,00293
xu1.5 -4,00002
xu1.6 -3,99998
xu1.7 1,00291
xu1.16 9,99991
xu1.49 10
xu1.8 22,37
xu1.9 1,00295
xu1.10 -2,37
xu1.98 10
xu1.11 1,00295
xu1.17 10
xu1.23 24,5015
xu1.21 25
xu1.26 1,00295
xu1.27 1,00295
xu1.25 1,25296
xu1.24 0,752955
xu2.3 1,25148
xu2.4 1,23488
xu2.5 -3,75463
xu2.6 -4,25007
xu2.7 1,50291
xu2.16 9,99991
xu2.49 10
xu2.8 22,37
xu2.9 23,0699
xu2.10 -2,37
xu2.98 10
xu2.11 23,0699
xu2.17 10
xu2.23 25,8437
xu2.21 25
xu2.26 23,0699
xu2.27 23,0699
xu2.25 22,8762
xu2.24 22,3762
v.xu2.va8#branch 0,0221823
v.xu2.va7#branch -8,4469e-13
v.xu1.va8#branch -2,3509e-07
v.xu1.va7#branch 2,3509e-07
l.xu2.l2#branch 8,74852e-08
l.xu1.l2#branch 8,99852e-08
e.xu2.e1#branch 0,0221823
e.xu2.eh#branch 0,000990757
e.xu1.e1#branch -2,3509e-07
e.xu1.eh#branch -1,79998e-11
v.xu2.v4#branch 0,000443875
v.xu2.v5#branch -1,94644e-13
v.xu2.va3#branch 0
v.xu2.v3#branch 2,54409e-11
v.xu2.v2#branch -0,000546882
v.xu1.v4#branch 1,60163e-11
v.xu1.v5#branch 1,6022e-11
v.xu1.va3#branch 0
v.xu1.v3#branch 3,37395e-12
v.xu1.v2#branch 2,1368e-11
v2#branch -0,0015
v1#branch -3,19753e-11
v4#branch -0,0101
v3#branch -0,0327262
a$poly$e.xu2.eos#branch_1_0 -6,59848e-11
a$poly$e.xu1.eos#branch_1_0 -3,49768e-11
Reference value : 0,00000e+00
No. of Data Rows : 785
Warning - approaching max data size: current size = 1436,152 MB, limit = 1414,664 MB

Can be ingnored.

You will get rid of it if you add dc 0 to the line setting the V1 values:

dc 0 PULSE(1V 2V ...

Can I use the LM319 in combination with NgSpice ? I am asking because I want to use a faster opamp as a comparator but there are two opamps in one package. Now I do not know how to connect the pin numbers to the simulation file

Thank you! that seems to work fine! ques I need to find a faster opamp now :slight_smile: pls see above

Please see my comment at the bottom of chapt. 5 (http://ngspice.sourceforge.net/ngspice-eeschema.html#digi) and my bug report at https://bugs.launchpad.net/kicad/+bug/1781290. You may support the bug report by a #metoo.

For now you will need to add some work to the OpAmp model:

Download the PSPICE model from ST.

This is the internal pin numbering for simulation:

*-----------------------------------------------------------------------------------------
* LM119/LM219/LM319 spice macromodel
* CONNECTIONS :
* 1 NON-INVERTING INPUT
* 2 INVERTING INPUT
* 3 POSITIVE POWER SUPPLY
* 4 NEGATIVE POWER SUPPLY
* 5 OUTPUT
*
**********************************************************

The pin numbering from the SO-14 package is
1 nc
2 nc
3 gnd1
4 in+1
5 in-1
6 vcc-
7 out2
8 gnd2
9 in+2
10 in-2
11 vcc+
12 out 1
13 nc
14 nc

How to match these two?

Create a new subcircuit using the downloaded Opamps_Comparators_ST.lib library and put it into file LM319.lib. Use the same folder for both files.

* Lib file LM319.lib
* Include this subcircuit when editing the eeschema spice model for the LM319
.subckt LM319_dual 1 2 3 4 5 6 7 8 9 10 11 12 13 14
* complete lib file for LM 319
.include Opamps_Comparators_ST.lib
* first opamp
* in+ in- vvc+ vcc- out
X319_1 4 5 11 6 12 LMX19
* second opamp
* in+ in- vvc+ vcc- out
X319_2 9 10 11 6 7 LMX19
.ends

The gnd pins and nc pins are not used in the simulation.

I did not test this, having no KiCad here at hand. Hopefully there is no typo.

1 Like

Hello Holger thank you for the reply!

I did as you suggested. But I got a lot of errors, then I deleted all the text out of the "opamps_comparators_ST.lib except for the text used for the LM319, the text still in the file is below:
------------------------------------------------------------------------------------------------------------------------------

* LM119/LM219/LM319 spice macromodel
* CONNECTIONS :
* 1 NON-INVERTING INPUT
* 2 INVERTING INPUT
* 3 POSITIVE POWER SUPPLY
* 4 NEGATIVE POWER SUPPLY
* 5 OUTPUT
*

.SUBCKT LMX19 2 1 44 55 33
EVCCP 4 0 44 0 1.0
EVCCN 5 0 55 0 1.0
VREADIO 3 33 DC 0
R_ICCSAT_HIGH ICC_OUT_HIGH 0 1k
R_ICCSAT_LOW ICC_OUT_LOW 0 1k
G_ICCSAT 44 55 VALUE={IF(V(3)>(V(44)+V(55))/2, V(Icc_out_high), V(Icc_out_low) ) }
E_ICCSAT_HIGH ICC_OUT_HIGH 0 VALUE={4E-4*V(44,55)}
E_ICCSAT_LOW ICC_OUT_LOW 0 VALUE={1E-3 + 1E-4*V(44,55)}
G_IOUT_SINKED 55 0 VALUE={IF (V(1)<V(2), 0, I(VreadIo))}
.MODEL MDTH D IS=1E-11 KF=1.050321E-32 CJO=10F
* INPUT STAGE
CIP 2 5 1.000000E-12
CIN 1 5 1.000000E-12
EIP 102 0 2 0 1
VIO 10 102 880U
EIN 16 0 1 0 1
RIP 10 11 6.500000E+01
RIN 15 16 6.500000E+01
RIS 11 15 1.939046E+02
DIP 11 12 MDTH 400E-12
DIN 15 14 MDTH 400E-12
VOFP 12 13 DC 0.000000E+00
VOFN 13 14 DC 0
IPOL 13 0 100E-06
CPS 11 15 3.7E-10
DINN 17 13 MDTH 400E-12
VIN 17 5 2.000000E+00
DINR 15 18 MDTH 400E-12
VIP 4 18 2.000000E+00
FCP1 4 0 VOFP 80 
FCP2 0 4 VOFN 80
FCN1 0 5 VOFP 30
FCN2 5 0 VOFN 30 
FIBP 2 0 VOFN 3E-03
FIBN 0 1 VOFP 3E-03
* AMPLIFYING STAGE
RG1 5 19 2.85E+05
RG2 4 19 2.85E+05
DOP 19 25 MDTH 400E-12
VOP 4 25 1.097
DON 24 19 MDTH 400E-12
VON 24 5 1.097
FIP 0 19 VOFP -104 
FIN 0 19 VOFN -104
EOUT 26 5 19 5 1 
.MODEL NMOD NPN(IS=0.1E-09 BF=1500)
RBOUT 27 26 800K
QOUT 103 27 28 28 NMOD
RCEOUT 103 28 15.02E+07
REOUT 28 5 20
RSOUT 3 0 1E+12
VNUL 3 103 0
.ENDS LMX19

-------------------------------------------------------------------------------------------------
The Errors I see in the simulator are:

Warning: Nesting of subcircuits is only marginally supported!
Circuit: KiCad schematic
Error: no such function 'if'
Error: no such function 'if'
Error: no such function 'if'
Error: no such function 'if'
Error on line 0 :
b.xu2.b.x319_1.bg_iccsat xu2.x319_1.g_iccsat_int1 0 v= if ( v(xu2.x319_1.3) > ( v(net-_u1-pad7_) + v(net-_u1-pad4_) ) /   2.0000000000e+00 , v(xu2.x319_1.icc_out_high) , v(xu2.x319_1.icc_out_low) )
parameter value out of range or the wrong type
Error on line 0 :
b.xu2.b.x319_1.bg_iout_sinked xu2.x319_1.g_iout_sinked_int1 0 v= if ( v(net-_u1-pad2_) < v(net-_r1-pad1_) ,   0.0000000000e+00 , i(v.xu2.v.x319_1.vreadio) )
parameter value out of range or the wrong type
Error on line 0 :
b.xu2.b.x319_2.bg_iccsat xu2.x319_2.g_iccsat_int1 0 v= if ( v(xu2.x319_2.3) > ( v(net-_u1-pad7_) + v(net-_u1-pad4_) ) /   2.0000000000e+00 , v(xu2.x319_2.icc_out_high) , v(xu2.x319_2.icc_out_low) )
parameter value out of range or the wrong type
Error on line 0 :
b.xu2.b.x319_2.bg_iout_sinked xu2.x319_2.g_iout_sinked_int1 0 v= if ( v(net-_r1-pad1_) < v(net-_u1-pad2_) ,   0.0000000000e+00 , i(v.xu2.v.x319_2.vreadio) )
parameter value out of range or the wrong type
Background thread stopped with timeout = 0
Reducing trtol to 1 for xspice 'A' devices
Doing analysis at TEMP = 27,000000 and TNOM = 27,000000
doAnalyses: parameter value out of range or the wrong type
run simulation(s) aborted

------------------------------------------------------------------------------------------------------------------------------------
From my understanding the simulator can not understand the “if” statements in the text. Can you please advise what to do?

Another question is how to do the layout in this forum how can I make it more clear what text I did past. As you do below the text: “This is the internal pin numbering for simulation:” ?

Thanks for the help so far!

Please read in the tutorial http://ngspice.sourceforge.net/ngspice-eeschema.html#setting the passage about setting ngbehavior. Deleting text from “opamps_comparators_ST.lib” is not required.

There is a button “preformatted text” right above the editor window </>

Copy and past the ngspice output or file input, then mark this text and push the </> button.
without:
123 456
with:
123 456

1 Like

Thank you Holger!! Now it works! I made the mistake of adding the file .spiceinit while KiCad was running. I had to close and restart KiCad and Spice before the file did take effect! Now it works. Thanks for the help!
:grinning::smiley::birthday::grin:

1 Like

I played a lot with the NgSpice but now I got another problem it seems the transistor model is not working. Pictures below clarify it in the best way
the schematic:

the output:

basically it is a simple schematic the at the output if the opamp there is a pulse creating a voltage drop across the base diode of Q1. When there is a voltage drop higher than 0.6V the transistor should start conducting and the voltage across R8 should go high. But nothing happens the green line stays 0v. Strange thing is when I try to click add signal and try to click Ib(Q1) there is no graph added simply noting happens. This makes me think there might be some kind of error. Maybe the model uses B, E, C, notation and the schematic uses 1,2,3?

So question is above With the opamp I can do “alternate node sequence” do I need to do something similar here? There is also no description in the model if the base of the emitter is first in the row as with the opamp there was some text like this:

LM119/LM219/LM319 spice macromodel
* CONNECTIONS :
* 1 NON-INVERTING INPUT
* 2 INVERTING INPUT
* 3 POSITIVE POWER SUPPLY
* 4 NEGATIVE POWER SUPPLY
* 5 OUTPUT

Can someone tell me whats wrong?
Here is the model I downloaded from On semi:

**************************************
*      Model Generated by MODPEX     *
*Copyright(c) Symmetry Design Systems*
*         All Rights Reserved        *
*    UNPUBLISHED LICENSED SOFTWARE   *
*   Contains Proprietary Information *
*      Which is The Property of      *
*     SYMMETRY OR ITS LICENSORS      *
*Commercial Use or Resale Restricted *
*   by Symmetry License Agreement    *
**************************************
* Model generated on Oct 19, 09
* MODEL FORMAT: PSpice
.MODEL Qbc856blt1g pnp
+IS=1.16043e-14 BF=2726.91 NF=0.9279 VAF=700.911
+IKF=1 ISE=8.16266e-15 NE=1.242 BR=0.1
+NR=1.0784 VAR=0.9286 IKR=10 ISC=8.16266e-15
+NC=1.58765 RB=6.07062 IRB=0.1 RBM=0.1
+RE=0.0123141 RC=0.654735 XTB=0.682288 XTI=4
+EG=1.206 CJE=2.43824e-11 VJE=0.785842 MJE=0.389187
+TF=5.73838e-10 XTF=15.4418 VTF=1.50941 ITF=1.19489
+CJC=1.22792e-11 VJC=0.95 MJC=0.565156 XCJC=0.898882
+FC=0.8 CJS=0 VJS=0.75 MJS=0.5
+TR=1e-07 PTF=0 KF=0 AF=1

In fact you have to check the pin numbering of your transistor. It is not about the model, but about the instanciation of the transistor in the netlist. As the ngspice manual tells you in chapter 8, a bipolar transistor is instanciated by
QXXXXXXX nc nb ne <ns> mname
so always
Device name, collector, base, emitter (optional substrate), model name.
In your circuit netlist it should read
Q1 3 1 2 Qbc856blt1g
You did not show us the netlist, but if your transistor line differs, you probably have to choose an alternative node sequence.

1 Like

sorry I forgot the netlist here it is:

.title KiCad schematic
.include "/home/me/Documents/simulate/NGSpice/diode tester 6/opamp_models/ST/LM319.lib"
.include "/home/me/Documents/simulate/NGSpice/diode tester 6/opamp_models/Ti/LF356.MOD"
.include "/home/me/Documents/simulate/NGSpice/diode tester 6/transistor models/BC856BL.LIB"
R3 Net-_R3-Pad1_ Net-_R3-Pad2_ 1k
V3 Vcc 0 25
V4 0 Net-_U1-Pad4_ 5
V1 Net-_C1-Pad1_ 0 Pulse(1V 2V 0 0.1u 0.1u 5u 10u 0 )
R4 0 Net-_R3-Pad1_ 1k
V2 Net-_R3-Pad2_ 0 1
XU1 Net-_C1-Pad2_ Net-_U1-Pad2_ Vcc Net-_U1-Pad4_ Net-_U1-Pad2_ LF356/NS
R5 Net-_Q1-Pad1_ Net-_R5-Pad2_ 10k
XU2 NC_01 NC_02 0 Net-_U1-Pad2_ Net-_R3-Pad1_ Net-_U1-Pad4_ Net-_R6-Pad2_ 0 Net-_R3-Pad1_ Net-_U1-Pad2_ Vcc Net-_R5-Pad2_ NC_03 NC_04 LM319_dual
R6 0 Net-_R6-Pad2_ 1k
C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 1u
R2 0 Net-_C1-Pad2_ 1000k
R1 0 Net-_C1-Pad1_ 50
R7 Net-_Q1-Pad1_ Vcc 2k
R9 Net-_Q1-Pad3_ 0 1k
XQ1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ Qbc856alt1g
R8 Vcc Net-_Q1-Pad2_ 1
.save @r3[i]
.save @v3[i]
.save @v4[i]
.save @v1[i]
.save @r4[i]
.save @v2[i]
.save @r5[i]
.save @r6[i]
.save @c1[i]
.save @r2[i]
.save @r1[i]
.save @r7[i]
.save @r9[i]
.save @r8[i]
.save V(0)
.save V(GND)
.save V(Net-_C1-Pad1_)
.save V(Net-_C1-Pad2_)
.save V(Net-_Q1-Pad1_)
.save V(Net-_Q1-Pad2_)
.save V(Net-_Q1-Pad3_)
.save V(Net-_R3-Pad1_)
.save V(Net-_R3-Pad2_)
.save V(Net-_R5-Pad2_)
.save V(Net-_R6-Pad2_)
.save V(Net-_U1-Pad1_)
.save V(Net-_U1-Pad2_)
.save V(Net-_U1-Pad4_)
.save V(Net-_U1-Pad5_)
.save V(Net-_U1-Pad8_)
.save V(Net-_U2-Pad1_)
.save V(Net-_U2-Pad13_)
.save V(Net-_U2-Pad14_)
.save V(Net-_U2-Pad2_)
.save V(Vcc)
.tran 1u 100u
.end

so basically you are looking for this line right? :

XQ1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ Qbc856alt1g

so I have two options:
change the schematic symbol
or do the alternate node sequence 3 1 2
?

XQ1 is wrong, it should read Q1.
The transistor model starting with .model is not a subcircuit. When you edit the Spice model of Q1, its model type is not ‘subcircuit’, but ‘BJT’

And then you have to check for the correct node sequence.

1 Like

Bravo @holger. You almost wrote a tutorial in this thread.
I was only away for two weeks and this thread happened… :wink:

1 Like