Need help laying out a footprint for a socket

Hello there,

I’m new to KiCad and need some help, a push in the right direction. I’m trying to map out a breakout board for a 100 pin QFP, dimensions included. I’ve watched a few videos but haven’t figured out the easiest way to place a through hole pad, one at a time. Any ideas? Thanks

I don’t know what the more seasoned users of KiCAD will suggest, but personally I’d create me two footprints:

  • one that contains the QFN-100 package (easy peasy, might even exist already?)
  • and the other for the plated through hole array (how you need them), as the pad numbering and order will then be easier to control via array creation

Both then need schematic symbols with 100 pins each that you have to connect up in Eeschema to get the wiring in pcbnew done with DRC enabled.

To get you started:

Next step would be to edit the position of PTH #21:
X: -9.425 (= 18.85 / 2)
Y: +14.95 (= 29.9 / 2)
And then make a new array that fits the structure of the bottom sector and so on…

PCB_QFN-100_Adapter.kicad_mod (2.4 KB)

PS: the PTH hole in that screenshot and the ones in the file are missing copper on the back and the mask as well, you need to change that if you want to take the file.

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This looks like exactly what I needed, thanks! I’ll run with this and post an update in a bit.

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I can’t upload what I have so far (new user) so I threw it on a free hosting site. I can never tell if I have the dimensions exact.

I also found the package in a library and have that going.

You somehow managed to create pads for the first sector twice… they are all on top of each other and you forgot to modify the pads to have copper and mask on the back as well.
Also the numbering for the sectors 3 and 4 are not taken care off.

PCB_QFN-100_Adapter.kicad_mod (13.7 KB)

Strange, I don’t notice the second set on top of the first. I did copy the first one and rotated it since they are the same on each side. I wasn’t quite finished.

The second footprint, did you suggest that because it would be easier to map everything out with?

My end goal is to have every socket pin correlate to a switch (GND and VCC) and test pin. The last time I did this (using ExpressPCB), I mapped the socket and then just laid down pads for everything. It sounds like with kicad, all of that is automatic.

Tell me about it… after I made the screenshot I managed to load another footprint without saving that one there, so I actually made it twice :flushed:

You got 2x 100 pins there that need to be connected - reliably and easy - so using the array function for pads in footprints (for each of them, the QFN and that socket) and then using Eeschema to connect them up seems the most straight forward way to me (ERC/DRC will help you and not work against you that way).
One naturally could do this all with single PTH footprints, DRC disabled and whatnot. but you’ll definitely run into trouble with numbering of arrays (unless you want to place every single one of them manually) as that function is not really ready for prime time in pcbnew.

Even more important to use Eeschema to get this all linked up.

I may of confused you! That is the only socket on the board.

  • I just made the footprint for the 8 pos. Dip switch. Now I’ll need to make a device with 100pins to correlate with the 100 pin QFP footprint?

Yes… a 100 pin symbol for the socket adapter pinout from above.
You probably can just re-use the qfn symbol for that?

Yes, used that, deleted all the pin references and now have a blank component. I have the footprint and components for the switches and pin connectors…

My new issue is when I place a component in EEschema, does it matter that my pin numbers for the switches aren’t cascading. For example, when I place a 2 switches, they both have pins 1-8, will that mess up pcbnew when it auto places my footprints?

no, the wires in eeschema will translate via the netlist, so pcbnew will know which switch footprint needs it’s pins connected to which pins of the other footprints.

Thanks for your help, just about done… Just need to set or wire the switch vias to PWR/GND plane.

100pin QFP.kicad_pcb (153.6 KB)

Is there any means to enter a netlist in PcbNew ?
I find I can add tracks fine, but it does not net-tag them.
I can, of course, use an editor + append to add connections, but pcbnew really should have that ability ?

Strangely, when I import PCAD files that lack net-names, and seem to be traces only, pcbnew will do some pass to attach net names to those.

There are some PCBs that really do not need a SCH, and breakout boards are in that class.

While the questions are coming, is there a way to connect set a via to a internal layer (GND/PWR) or do I need to add a track.

If you want to pour those internal layers, and have thermals, then you will need at least a matching NET name for the pour area, and the pins you want to connect to that.

You can disable DRC, draw tracks how you like them and then re-enable DRC again (this seems to trigger a routine to attach tracks to nets). Tracks should then stick to those pads and become some sort of net (or part of a net) - to make really sure, save the layout, restart pcbnew and see if they are still attached.
A year ago, when I was starting with KiCAD I needed something that came without a schematic and did it somewhat like that… but as I didn’t have the experience I have now I did not really approach this with the needed scrutiny to be able to share wisdom ;-).

If you set a via it needs to have a piece of track attached that connects a pad somewhere to stay with a net. If the via isn’t connected to a net on a pad of a device it will loose the net connection!
It will look good in a live session, but a save and reload will shake it loose.

sounds useful, but when I try all combinations of DRC on/off and Canvas and save/reload, the net-name field is always blank, and no net-tags apply to Pins.
Strange thing is when adding the trace, it adds a rats-nest to the nearest pin, so that suggests it is trying to be net-intact, but I always have just floating traces (and of course they fail a DRC run)

This is Version: (2016-06-19 BZR 6943, Git e27f90a)-product, release build
Maybe this undocumented behaviour has suffered a regression ?

Yeah, you’re right… it doesn’t create nets by doing the disable DRC - draw tracks - enable DRC dance.

I think back then I modified a layout file in an editor to get some net started and worked from there. The problem then were tracks that I made outside of KiCAD and they needed to be attached to nets, which I solved.
Didn’t had the need to create nets from-thin-air in pcbnew yet :open_mouth:

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OK, thought I may have missed something.
Yes I can add nets easily enough in an editor, but this is a feature KiCad really should fix.
Especially as it seems to add Net-Name-tags just fine, on loading a PCAD File missing them.