I am trying to design a small circuit board to plug onto an existing vero board layout.
It consist of two IC’s and four connection strips that insert into sockets on the vero board to produce a circuit of double height.
I would like to send the finished design away to to have the board made.
rb.kicad_sch (224 Bytes)
rb.kicad_pcb (127.5 KB)
I have never done this before and am finding problems I don’t understand?
If I do a DRC check I get all sorts of errors.
Would someone mind taking a look and perhaps telling me where I am going wrong?
thanks.
- Your schematic does not work. 227 bytes is also too small for a schematic.
- In KiCad, always work with a project, not with separate schematic and PCB files.
- If you then zip up and post the whole project, it’s easier for us to have a look at it.
- Your PCB outline is not defined. Draw a rectangle on the Edge.Cuts layer to define the outside edges of the PCB.
- You do have a few via’s, but they are not connected. Draw tracks on F.Cu to connect them. All PCB manufacturers do two layer PCB standard. It is not more expensive then single layer PCB’s.
Things like this are not helpful:
If you want help with some specific problems, then at least post the full text of the error message.
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Your schematic file is empty, you probably uploaded the wrong one or something went wrong. Use the archive function and upload a zip of the project.
Most of the DRC warnings and errors are easily explained, but you should include the text of the errors to help us help you. Even if you cannot upload images, you can dump the DRC messages as text and include as verbatim text in your message.
But I’ll deal with one. You have no board outline. You need to draw the board outline in the Edge.Cuts layer. See here:
Thank you for the replies, I am new to this and totally confused about how kicad saves files. If I open rb.kicad_pro I get
whereas if I open full file.kicad_pro I get
I am unsure as to whether to delete some of the files as I don’t know what I will lose.
The zip file I think you want, I have done with ‘archive project’ from the file pull down is
rb-2024-12-12_183934.zip (169.1 KB)
Is this the file you need to be able to see what I am doing wrong?
Why are there so many files under the project? I’m guessing the one you have been working on is rb.*
Generally you should have one set to sch and pcb files per project (Unless you start using multiple sheets for more complex projects but you are probably not there yet)
First thing you need to so is make sure you are happy with the schematic. Run a ERC on the schematic and make sure all the errors are gone.
For unconnected pins place the not connected flag.
Use power symbols to make reading of the schematic easier (Vcc and GND)
If you invert J1 it will make it easier to follow the schematic as the wires do not need to cross each other.
Then onto the PCB.What’s with all the pin 9’s everywhere? These are not on the schematic and causing chaos. Are they supposed to be jumpers? If you want to use jumper’s you need to have a symbol for it on the schematic.
If you are getting the board manufactured why not just do a 2 layer board and get rid of the jumpers?
There are also a few unconnected points. U2 pin 15 for example.
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My best guess is that the same project is saved under different names, possibly with Project manager / File / Save As. Normally you have only one project in a KiCad directory, and that project also has the same name as the project. However, at the moment there are 5 different projects in your zip file:
$ ls -hl *kicad_pro
14K Dec 10 22:33 'board 9_new.sch.kicad_pro'
14K Dec 10 20:59 for_prtinting.kicad_pro
14K Sep 25 18:42 'full file.kicad_pro'
16K Dec 11 21:52 rb.kicad_pro
7,8K Dec 12 00:53 rb-osh.kicad_pro
They are also approximately of the same size. I assume they are just copies of each other. Similar for the schematic (4 files) and the PCB (also 5 files).
Hi Paul,
I think there are so many files because I have been just saving sch’s and pcb’s instead of projects. I am cleaning them up and saving each project to a usb stick.
I will then delete all the orig’ files and then get onto your suggestions, I will get back to you as I progress.
Sorry gmc I read the replies without connecting them to the originators.
thanks for the time, I have added ‘not connected’ flags and added power symbols
to both J1 pin 4 - 5v and to J2 pin 4 - gnd.
I now have
What else do I need to add?
I think J1 is OK pin 1 and 4 will still be inverted.
I don’t see any pin 9’s? have I removed them on the last version I sent? I can see two 'RB’s but I can’t see how to remove them.
rb.zip (51.8 KB)
I am glad you spotted that pin 15 of U2 is not connected, in fact the pins all want to move up one place, The problem is on the sch. I have corrected it now.
rb.zip (44.8 KB)
On the PCB there are a few pads labelled pin 9 which is causing all the issues.
A few other tips, with the schematic, it’s a cosmetic change but the symbol for GND you used is normally reserved for earth. It won’t make any difference with the schematic but makes it easier for someone else to read or when you schematics get more complicated.
You can also split the 5V / GND lines with the symbols - no need to run wires all over the place. For example:
Inverting J1 will give a cleaner result:
Similarly with J2
Try not to cross wires over symbols:
Power pin not driven by output power pin means KiCad can see the pin is a power input pin, but cannot see where the power is coming from. ie there should be a power output pin connected to the power input pin. Power output normally comes from a connector pin or a DC plug but in this case you can use the PWR_FLAG to resolve it:
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Thank you gmc I have now altered the sch to reflect your suggestions.
All the nines will be because I copied and pasted vias to make up the ‘other holes’, there are similar numbered vias on each IC, do I need to change the numbers?
I want to put a capacitor between the power and gnd for the IC’s. I don’t usually when I build circuits so I am not sure how important they are but I have put one just below and to the right of U2.
To do this I have had to slightly alter the track at that point and removed the copper fill to do so. When I try to replace the copper fill it just puts a box around my choice and doesn’t show it as copper fill? Am I correct in calling it copper fill?
Also is it possible to remove all the names of all the components from the PCB editor, they look untidy?
thanks.
rb.zip (25.7 KB)
The pads on the IC footprint are not vias, stop calling them that. They are plated through hole pads and you shouldn’t be copying them from an IC footprint.
Vias have a command in the PCB editor to create, under the Place menu or with the associated hotkey.
You don’t need to “remove copper fill” when you lay down more tracks. It will automatically avoid tracks that are not in the same net; it’s special that way.
If that is true can you explain the failure to do so when I reload an old copy (before I removed the fill), altered the ‘PAD’ to the lower right of the IC and the fill now interferes with the new track?
rb.kicad_pcb (146.6 KB)
I’m not at my computer so I’ll get to it later. Make sure you do a refill with hotkey B. Make sure it’s truly a copper fill zone and not a copper area that you’ve drawn with other tools. If you select objects the status bar will tell you what it is and its properties.
I don’t see any problem. When I add a track to pad 9, and then refill the zone with B, the zone avoids the new track.
In the past, I think back in v5, the refill was automatic, but this slowed down the program on complex boards, so now you have to refill the zone with B whenever you want to visualise the board. Automatic refill is an option that has to be turned on in Preferences.
Oh and your bottom edge cut is slanting slightly. In case you want a rectangular board.
Still lots of issues here.
As the poster above said, these are not vias. You have used a through hole pad which is confusing things because this is not on the schematic. You need to replace them with via’s
Running a DRC reveals a number of problems
- silkscreens overlapping J4/U2 and J1/U1
- different nets are bridged (due to the pin 9 issue)
- Your edge cut is invalid. Use edge.cuts instead of b.silkscreen. It’s also not perfectly rectangular. Might be easier to draw a simple rectangle instead of 4 lines and getting them to match up.
- You have 2 RB labels hidden away in the bottom far right.
- The copper zone is not tied to any net so its floating. Not a good idea - you probably want this to be GND
- underneath C1 you have 2 more TH pads pin 9
You can hide the names by toggling F.Fab off.
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I have now managed to get the fill to work again?
For ages it just failed to fill?
Maybe I had some other error that stopped it?
Automatic refill zones is ticked in preferences?
I haven’t tried it since I got the zones to fill again.
- Silkscreens now don’t overlap.
- I can’t see how to solve nets bridging, I duplicated the pads/vias I am not sure how to produce these, see later.
- I have produced an edge cut with the ‘draw rectangle’ icon, it is blue instead of white, is this correct?
- How do I get rid of the ‘RBs’?
- I would prefer the copper zone floating, if I make the fill with it connected to GND it works, I have done it that way on the upload below, I would remove the unrequired tracks before presenting it for manufacture and it means I only need one track on the front side, I wonder if it would be cheaper to make with no track on the front and a link instead? Just musing.
- I have moved c1 so it may not have TH pads below now.
pads or vias?
I click on ‘add vias’ down the right side, alter the size to 1.6mm with a 0.8mm hole (same as all the others) and try to place it. It appears without a through hole even though it is clearly marked in the preferences as ‘through hole’ (though it is ‘grayed out’?).
Do I want pads or vias for through hole use for connecting the top track to the bottom track as I have tried to do below left and above U1? Pads on the top one and vias on the bottom one I think?
rb.zip (48.3 KB)
The last version of your PCB looks a lot better. I had a look at the remaining issues and fixed them on the go to see which issues were left over.
What I did was:
- Zone properties → Remove Islands.
- Rectangle on B.Cu, moved to Edge.Cuts.
- Delete the two footprints for the holes In the +5V net.
- PCB Editor / File / Board Setup / Design Rules / Net Classes Track width: 1mm, Via Size:1.6mm, Via hole: 0.8mm (This are the settings you already used. Learn to use the Net Classes, they are an important feature of a PCB design).
- Redrew section of the +5V net.
- Deleted the two C1 capacitors, Update PCB, placed the new capacitor.
- PCB Editor / Inspect / DRC. PCB is now free of DRC violations.
- There are some texts on B.Cu but outside of the PCB boundary, you probably want to delete those.
I do not know which version you use. I use KiCad V8 and this is now also the file version of the project below. It’s good for you to replicate these changes in your own project, and also learn why (and how) I made these changes. For me they were obvious, but I have also been using KiCad for 10+ years. 
rb_2024-12-14.zip (37.1 KB)
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Thank you so much paul.
I use V8.
I am interested in getting someone to print the design for me, I looked at OSH park who say for $11.10 they will make me 3 copies of that board and sending your design meets their criteria.
I sent one of my design a few days ago and they accepted that?
I, of course, have to be unsatisfied with that and want to add another board I am designing to drive the shift registers on the rb board using an arduino. With the hope of being able to cut the two designs up so they can both can be connected to the veroboard I already have populated with switches and leds.
Therefore I would like to keep picking your brain if you don’t mind. I am awkward In that I would like to understand how to produce it rather than just using your design corrections but you have really helped me so far.
- Zone properties (how do you make an arrow
) ‘remove islands always’ in the bottom corner of properties. - I clicked on the edge cut, went to properties and changed B.Cu to edge cuts, that then turned the line white, (see 3rd bullet of my last post).
- I assume you mean for the track on the front side above U1? I will try to learn more about when to use pads and when to use via’s,
- I can alter that now. nuisance every time I made a track to have it so thin
. - Again, I think you are referring to the line on the front side above U1, it looks much better now.
- I deleted a cap from the lower right of U2 on my version and there was still one there?
- So is mine
- How do I delete the RB’s to the right of the design?
I will now be able to refer to this conversation for tips about how to do things from here but expect me to add to it at a later date.
Do you mean the arrow character → ? ->
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- Vias are used to connect different layers together. You need to use these any not through hole pads. This is a job for a via.
- Remove the extra through pads from under the cap pads.
- On the selection filter enable text. You can then click on the RB and delete.
You might as well use two layers, manufacturers will change the same. They probably rarely manufacture single later boards anyway.
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