There is an error in the footprint MSP-10_3x3mm_P0.5mm
The space between pads, at 0.15mm, is far too close for many pcb assemblers. The MSOP-10 footprints have 0.2mm, but they also have ground pads. So there is no functional simple MSOP-10 in the library.
(I am using this for a MCP331x1D-XX. It is a ADC with SPI.
This is my MSOP-10 “Bigfoot” with fat corner pads.
Bobs_MSOP_10_Bigfoot.kicad_mod (4.1 KB)
I have used it in several board designs, because I have a bunch of ADP1621 ICs.
The fat corner pads make hand soldering easier.
The pin pitch for the IC package is 0.5 mm so the best you can probably do is use pads 2-4 and 7-9 0.25 mm wide. There is 0.25 mm space between pads on both sides.
General thing…it is not difficult to make footprints in KiCad. I mostly use my own footprints (such as the attached) which I edit from those in the standard library.
Parts like this are pushing at the limits of the low cost fabs. Sometimes you just have to pay a bit more.
Can you find one in the library without the pad in the middle and clearance of at least 0.19mm?
The typical distance between the edge of one pad to its neighbor is 0.2mm and fab houses typically have no problem with footprints down to 0.19mm.
Unfortunately, of the several MSOP-10 in the library, the ones that comply with that,all have the pad in the middle.
The one msop-10 that does not have the pad in the middle, has oversized pads for the rest, and leaves only 0.15mm in between. That is the problem/error pure and simple.
The standard footprint libraries for kicad are simply missing a proper 10 pin MSOP-10 footprint.
Yep you may be correct . . .
From: https://www.diodes.com/assets/Package-Files/MSOP-10.pdf
But you can copy this footprint to make your own custom version and change the pads literally in a few minutes.
Yes, thank you, I was planning to copy one and edit it. But, it is still a bug for the library. How do we report it and get it fixed?
I’m not sure if paint under generally small ICs is welcome.
I edited the footprint on the board for now.
Editing the library footprint would seem to run the risk of being overwritten at some update, and anyway, the library is write protected with no option availability in the footprint editor to get around it to save the footprint - another bug/feature request.
You can report it via the Report Bug button from KiCad > Help
Nope, the KiCad official libraries are read only on purpose. Just create your own personal libraries and copy and paste footprints (or symbols) there to be modified.
I agree about the mentioned footprint. Several datasheets from different manufacturers suggest 0.3 mm pad width which gives 0.2 mm room between pads. I don’t know why this one has wider pads compared to those with EPs.
On the other hand, at least JLCPCB and PCBWay – two cheap manufacturers, maybe the most popular today – can do 0.15 mm gap.
There is no idea in modifying KiCad libraries.
First what I have done with KiCad was to define my libraries. From what I have read about V5 new features I decided to not make any PCB with V4 (mainly via-stitching was said will be solved with V5).
So waiting for V5 I spend time making my symbols and footprints. Then when V5 was released I started to design PCBs with KiCad (I use only my libraries).
Those time in KiCad documentation it was explained how to use Symbol Editor and Footprint Editor. I didn’t read KiCad documentation since then. Do you want to say that these descriptions disappeared from the documentation?
I think this discussion is slowly derailing.
The OP complained about a footprint. And, looking at data sheets of different manufacturers, indeed, they all do suggest smaller pads.
Now, he got tips how to modify the existing FP. OK, but still, it should be fixed in the KiCAD FP library, so not thousands of users have to fix it (after the next release comes out), but a single person.
Answers of how to report that error have been given.
And yes, there are people that modify every footprint for whatever reasons. I (and I think I’m not alone) use what KiCAD provides. Sometimes I have to verify a footprint because the manufacturer named it slightly different. But still they matched until now.
And that’s what I like about KiCAD. A reliable tool that is a joy to use.
I did a Merge Request fix the issue:
Feel free to click thumb up on GitLab to hopefully push it to a quicker approval.
He’s always bringing it up that he should make a tag of it like #piotrusesownlibrariesonly and save typing the story everytime 
Personally I’m like you I first try to use what’s on hand because I’m lazy but I check. So yes library errors should be reported to save others problems. Just like the software, there may be a workaround for an annoyance but if it’s a bug it should be reported.
Do you know if it is possible to have tags named as I want them. I have 15 tags and each time I’m searching through them I have to point one after another and wait about 1s to see my description. with such working I don’t want to add new tags but rather am thinking of deleting some of them.
This time I have written it in response to suggestion that it is not possible to save footprint:
Oh, what a mess.
The four MSOP footprints (two Allegro & two Analog) are correct, according to the linked Data sheets.
The two MSOP footprints to the TI data sheets are incorrect, maybe, (the links are to the HVSSOP footprint ).
I don’t know about the Jedec linked footprint.
There is also a TSSOP-10_3x3mm_P0.5mm with a NPX Data sheet which would suit the OP.
The discussion almost feels like a lost cause at this point, but I am not sure why we see so much variation in dividing the 0.5 mm pitch between pad width and creepage between pads.
It seems likely that (at least with hand assembly) a narrow pad will make it more difficult to hold the IC pins on the pads while soldering, and a narrow creepage will make it more difficult to keep the pads from shorting. Perhaps also more susceptible to some sort of failure over time given the presence of dirt, humidity, and voltage.
My package with the wider corner pads makes it easier to hold the IC pins up on the pad while soldering.
I think this because at least one or two of the pins will not fall off the pad edge due to slight mis-alignment, and this will tend to keep at least one end of the IC from falling down. I feel like this may make it easier to work with the 0.25 mm pad width which sounds like it is narrower than most of the standard recommendations. My hands are no so steady but I have done reasonably well with this footprint. It is probably the most difficult-to-solder IC package which I have done successfully. In my job of some years ago, I ended up with (many for personal use) ADP1621s which is in the MSOP-10. So I tend to use it where it is a viable option.
