So I am trying to simulate a circuit with a monostable 55 timer (.sch attached). I am using the model spice model h been updated by @holger to accommodate ngspice (also attached). However, I keep getting the world-famous timestep too small and can’t converge errors. Any thought about what might be wrong in my circuit? It simulates fine all the way until before the 555 timer. In other words, if I remove the timer block and simulate, then it works just fine and I can see all the signals (V1,V2,V3 and V4). I also tried adding a 1g load resistor to the output pin of the 555 timer, but the errors persisted.
Please let me know what I’m overseeing. I have simulated the 555imter in an astable configuration with the same spice model before and it worked just fine. Attached are the models I’m using for the other chips.
Thanks y’all!
Mod4ReportBonus.sch (13.3 KB) TLC555ng.LIB (15.8 KB) LM311.301 (962 Bytes) ad620.mod (3.2 KB) LM741.MOD (2.5 KB)
What happens if you try the transistor-based model found in this post?
Also try getting rid of the UIC in the .tran command and see if it does anything. I know that some models get finicky with abrupt startup on the power rails if you don’t have a parasitic RC in place.
What I did to get this circuit up and running:
Use the original TI model file with adequate alternate node sequence
6 5 2 4 3 7 8 1
Upgrade ngspice to ngspice-35 (On MS Windows: replace kicad/bin/libngspice-0.dll and kicad/lib/ngspice/*.cm)
Add an .options statement:
.tran 0.1 4 uic
.options CHGTOL=1e-12
Place this line into .spiceinit:
set ngbehavior=ltpsa
Then I get this output plot:
KiCad 6 would ease this approach: no fiddling with .spiceinit, ngspice-35 is already included.
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