I found a procedure to make double sided PCB with vias using fibre laser.
I have yet to set up my fibre laser and try it because I come across a problem. I need a technique that exports just the via hole diameter ONLY.
The way it is supposed to work is like this with FR1 material (not viable with FR4).
- Use the special via hole ONLY file to make a via only stencil with fibre laser. This is separate and in addition to the top and bottom stencils for solder pads.
- Ablate the top and bottom tracks and isolation.
- Using same file special file, the via hole is ablated by laser from top layer to bottom, but stops at the bottom copper layer and not ablate through it.
- Then clean the hole with low power passes until copper is exposed and cleaned through the hole - but still not allow it to ablate through the bottom copper layer.
- So we now have a hole in the top layer, and hole to the bottom copper layer which has clean copper. We can use the via only stencil to squeegee the solder into the holes, and bake it to melt and join the top and bottom vias cleanly even if there are hundreds of through hole vias that need jointing.
- The through holes need to be excluded from the process otherwise they get blocked with solder. If through holes need to connect from top to bottom layer, they need additional separate vias added.
So what do you guys think? Can the vias be exported separately with a plugin for fibre laser to make double sided PCBs? This will easily cut double sided PCB prototyping work from days to 2 or 3 hours.
If someone can try doing manually fiddling with files, it will be of great help to know. 
Is this an idea or did you verify that solder paste doesn’t shrink (it does) in volume when melting?
Yeah - a lot of detail to refine. My fibre laser is down at the moment after being moved, so I cannot check anything right now. Practical problems need solving for each machine and PCB. The final cleaning of copper bottom layer need to avoid piercing copper by reducing power. May be jet of air needed as well. Stencil adds about 0.2mm extra thickness - but thicker stencil easy to do to add more solder paste. Via holes will need to be a little bigger so that angle of laser beam does not cause issues. Thinner PCB such as FR1 0.8mm works better. Testing required after melting to check if bond between both sides achieved. If it didn’t bond due to lack of solder paste, apply the solder paste again with stencil and reheat. and redo until hole is filled. The bottom side is sealed and solder paste unlikely to leak anywhere. etc. etc…
Maybe double baked bread gets better, but PCBs don’t.
How will you avoid bubbles? Check every via manually? In that time, you can also insert via rivets … Did Bungard make them? Are they still available?
The second, third… baking only for via joining. After that you got top layer to do with another stencil for SMD components. But you are right, reheats do not make boards better. Aim for a process that has fewest steps. And with fibre laser, it can vary from one batch of boards to next requiring tuning with a cut out of waste board. Bubbles rare - never seen one - as liquid solder likes to run everywhere through capillary action. In production, all tracks are checked for every board. For complex prototype boards, not checking is not an option and must be done manually. Or better still perfect your process so that you don’t have to check. Bubbles easy enough to go over with a hot air gun or soldering iron. Rivet have height and may not sit well under chips, and relatively big diameter and not easy option for boards with hundred(s) of via.
I used DeepSeek AI to unravel the via locations. It was exported in file > fabrication outputs > drill files to generate the drill files. Then simple PCB .drl file with 6 vias and other items generated. Then to DeepSeek and fed it the .drl file by pasting it, and asked it to identify the vias from all other hole types. And it said the only one item flagged as “ViaDrill”. Then I asked it to remove all other data and generate a minimalist .drl file containing only the plated through hole vias. It did that. I copied the data it generated and saved it as a .drl file and voila - just file with vias! 
Probably easy to create a python script to post process .drl file and make a via only .drl file.