Kicad and DDR4

I see references in this category that some are using Kicad for DDR3 and DDR4 but from my understanding the technical ability for time matching the package delays doesn’t exist yet? What are people using for say ARM board designs? I’ve been doing CAD for about 35 years and still have some of my Z80 chips that were fun to do back in the day but static ram was easy then and I had not kept up. I had mostly been doing Microchip and other various controller boards but now need to make an ARM PCB with DDR3/4, eMMC and a little work with the PCI bus however I am a little hesitant thinking Kicad is not up to this task so correct me if I am wrong there.

If the feature does not exist then wondering if it is being worked on or if I need to find a different EDA for this particular PCB need?

Thanks
James

You can tune lengths in KiCAD. what do You expect additionally?

Each DDR4 package line has a different timing and lining all those up so the source and destination timings are within tolerance seems a bit tricky. It would appear other EDA take care of this for you with their high speed design features but several have referencing in forum posts this functionality does not exist in Kicad which I’m not aware of as true or false other than I just want to make sure I’m designing it in an EDA that can test or verify my DDR is going to work correctly and not use guess work.

Are you talking ICs or modules?
The ICs have on-chip delay equalisation. For modules IDK.

It is a RK3568 with a Micro 512x32 chip design. From what I read every memory chip can have different package delays requiring different routing to get the DDR timing to be with in tolerance otherwise if it takes 3 pico seconds for a specific data line to be right that could be really bad.

I never found an example of any rockchip designs or any ARM open source designs using Kicad for what its worth so I wasn’t even sure if anyone had tried this.

my experience with DDR3 is: the FPGA manufacturer gives You some length matching specifications, and You route it according it. if You have timing tolerances, then i would let a tx-line tool calculate the length tolerances, and route according them.

That makes sense. I will reference this video at 18:30 https://www.youtube.com/watch?v=5vPeSdU22ns&t=703s as it specifies one pin with a delay of 41 and another at 61ps so just need to do the data line on either pin to make the balance of the time I take it.

use a software like QUCS and measure how fast Your signal is. FR4 is about Er 4.5

1ps will need about 190um

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Example of Zynq US + DDR4 below:

T.

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Thanks for that reference. I’ve reached out to my Rockchip team to see if I can get a reference design from them.