KiBot, fabrication and documentation automation

External Plugins
1

KiBot is a Python script that can be used to automate the generation of fabrication (gerbers, drill, etc.) and documentation (BoM, PDF, SVGs, 3D model, etc.) files.
In addition it can run the DRC and ERC automatically.
It can be integrated to CI/CD workflows.

The script uses other scripts to achieve some of the functionality and supports KiCad 5, 6 and 7.
Currently you can:

  • Run the ERC
  • Ensure the XML file used by KiBoM is updated
  • Generate the BoM (using KiBoM or an enhanced version of it that is part of KiBot). You can also consolidate parts from multiple projects.
  • Include components costs in the BoM using KiCost.
  • Print the schematic to a PDF, SVG, PS, DXF or HPGL.
  • Generate netlists in classic or IPC-D-356 formats.
  • Run the DRC
  • Ensure all zones are refilled.
  • Generate the gerbers (and all the other formats of the Plot menu SVG, DXF, HPGL, etc.). Including templates for Elecrow, FusionPCB, JLCPCB, P-Ban and PCBWay.
  • Generate the drill files (both excellon and gerber format supported, including the PDF maps)
  • Generate the position files (including rotation corrections and support for XYRS formats)
  • Print selected layers to a PDF/SVG/PNG/EPS/PS (what you get from the Print menu)
  • Export the 3D STEP, VRML, FBX, OBJ, X3D, GLTF, STL or PLY for the PCB
  • Create a 3D render of the PCB, using KiCad or Blender (high quality)
  • Generate images of how the PCB will look using different solder mask colors (using PcbDraw)
  • Generate an interactive mounting BoM in HTML (using InteractiveHtmlBom)
  • Export the PCB in Gencad format
  • Update KiCad 6 text variables (dates, git hashes, etc.).
  • Generate QR codes for the schematic and/or PCB.
  • Generate a report of the project, including information about minimum sizes, drill sizes, stack-up options and images.
  • Generate compressed files (ZIP, RAR or TAR) containing selected outputs
  • Join PDFs to consolidate documents.
  • Download the datasheets (using the URLs in the datasheet field of the schematic components)
  • Download 3D models from EasyEDA.
  • Generate a Makefile allowing to execute steps incrementally (i.e. only the affected stuff is redone)
  • Generate webpages to browse the generated files, take a look at this example
  • Compute the differences between two PCBs or schematics
  • Collect information about the environment and tools used during the process
  • Copy the 3D models of a project to some destination, also create a PCB adapted to use the collected 3D models.
  • Generate web pages showing how to assemble the PCB (using populate tool)
  • Generate web pages to present your project.
  • Panelize the PCB (using KiKit)
  • Create stencils (both steel and 3D printed, also using KiKit)
  • Generate a PCB and/or schematic with the variants applied.

For an example visit the Spora demo repo

Implements assembly variants, allowing:

  • Mark not fitted components with a cross in the schematic
  • Mark not fitted components with a cross in the *.Fab layers of the PCB
  • Remove solder paste from not fitted components
  • Remove adhesive glue from not fitted components
  • Exclude components from the BoM (also mark them as DNF and/or DNC (Do Not Change))
  • Exclude components from the interactive BoM
  • Remove not fitted components from the STEP file
  • Exclude components from the position (pick & place) file
  • Change any field according to the variant (i.e change the component value)
  • Change the 3D model/s

Currently three mechanisms are supported to specify variants: KiBoM, KiCost and IBoM styles. But this is also implemented as plug-ins, so more styles can be added.

In additions you can separate multi-board PCBs that uses the KiKit mechanism using variants.

For more information about variants visit the demo repo

All the output files are generated by plug-ins, so the script can be enhanced without needing to know all the internal details.

Currently you can run it on Linux and on CI/CD workflows like GitHub (docker files containing KiCad and all the supporting scripts are available). Some users succeed using Windows (using WSL or docker), but the setup is more complex. Most of the outputs can be used on plain Windows, but some really needs a Linux style environment.

I’m looking for collaborators to support Windows and MacOSX.

Changes in 1.6.3

Added

  • General:
    • OS environment expansion in ${VAR}
    • Now outputs can request to be added to one or more groups
    • PCB text variables cached in the PCB are now reset when the config
      uses set_text_variables. This is a complex dilemma of KiCad 6/7
      policy implementation. See
      KiCad issue 14360.
    • Default values for @TAGS@
    • Parametrizable imports
  • Command line:
    • --list-variants List all available variants
    • --only-names to make --list list only output names
    • --only-pre to list only the preflights
    • --only-groups to list only the groups
    • --output-name-first to list outputs by name, no description
  • Global options:
    • use_os_env_for_expand to disable OS environment expansion
    • environment.extra_os to define environment variables
    • field_voltage Name/s of the field/s used for the voltage raiting
    • field_package Name/s of the field/s used for the package, not footprint
    • field_temp_coef Name/s of the field/s used for the temperature
      coefficient
    • field_power Name/s of the field/s used for the power raiting
    • invalidate_pcb_text_cache controls if we reset the text variables cached
      in the PCB file.
    • git_diff_strategy selects how we preserve the current repo state.
  • Filters:
    • New value_split to extract information from the Value field and put it in
      separated fields. I.e. tolerance, voltage, etc.
    • New spec_to_field to extract information from the distributors specs and
      put in fields. I.e. RoHS status.
    • New generic options exclude_not_in_bom and exclude_not_on_board to
      use KiCad 6+ flags.
  • Internal templates:
    • JLCPCB_with_THT and JLCPCB_stencil_with_THT: adding THT components.
  • New internal filters:
    • _value_split splits the Value field but the field remains and the extra
      data is not visible
    • _value_split_replace splits the Value field and replaces it
  • Internal templates:
    • CheckZoneFill: Used to check if a zone fill operation makes the PCB quite
      different
    • Versions with stencil for Elecrow, FusionPCB, P-Ban and PCBWay.
    • PanelDemo_4x4: Demo for a 4x4 panel.
  • Render_3D:
    • realistic: can be used to disable the realistic colors and get the GUI ones
    • show_board_body: can be used to make the PCB core transparent (see inner)
    • show_comments: to see the content of the User.Comments layer.
    • show_eco: to see the content of the Eco1.User/Eco2.User layers.
    • show_adhesive: to see the content of the *.Adhesive layers.
  • Navigate_Results:
    • skip_not_run: used to skip outputs not generated in default runs.
  • Compress:
    • skip_not_run: used to skip outputs not generated in default runs.
  • Position:
    • quote_all: forces quotes to all values in the CSV output.

Changed

  • Command line:
    • --list also lists groups
  • KiCad v6/7 schematic:
    • When saving an schematic the hierarchy is expanded only if needed,
      i.e. value of an instance changed
  • List actions:
    • Now you must explicitly ask to configure outputs. Otherwise isn’t needed.
      As a result you no longer need to have an SCH/PCB. Use --config-outs to
      get the old behavior.
  • Git diff link file name:
    • Now we default to using worktrees instead of stash push/pop. As a side
      effect the names of the git points are chnaged. This is because main/master
      only applies to the main worktree. So the names now refer to the closest
      tag.
  • JLCPCB_stencil: Is now just like JLCPCB. The only difference is the added
    layers.

Fixed

  • KiCad v6/7 schematic:
    • Net Class Flags not saved in variants or annotated schematics
    • Repeated UUIDs saved in variants
    • Bitmap scale not saved in variants or annotated schematics
    • lib_name attribute not saved in variants or annotated schematics
  • Position:
    • Components marked as “Exclude from position files” not excluded when only
      SMD components are selected.
  • Diff:
    • KIBOT_TAG with n > 0 skipped n commits, not n tags
    • Details related to the project not applied during a diff involving a
      variant (project not copied)
  • Copy files:
    • PCB not loaded if the only action was to copy the 3D models
    • Problems for STEP models when copying models
  • Gerber:
    • Problems trying to compress gerbers for a board with inner layers when
      using legacy file extensions
  • Electro-grammar:
    • Problems with floating point tolerances (i.e. 0.1%)
  • KiCad user template directory autodetection for KiCad 7+

Changes in 1.6.2

Added

  • General:
    • Support for time stamp in the date (i.e. 2023-04-02T09:22-03:00)
    • Support to pass variables to the 3D models download URL
    • Support for netclass flags
    • Export KICADn_* environment variables for the older versions
      So you can use KICAD6_* variables on KiCad 7.
  • Expansion patterns:
    • %M directory where the pcb/sch resides. Only the last component
      i.e. /a/b/c/name.kicad_pcb → c
  • Command line:
    • --banner N Option to display a banner
    • --log FILE Option to log to a file, in addition to the stderr
  • Global options:
    • colored_tht_resistors to disable the 3D colored resistors.
    • field_tolerance field/s to look for resistor tolerance.
    • default_resistor_tolerance which tolerance to use when none found.
    • cache_3d_resistors to avoid generating them all the time.
    • resources_dir to specify fonts and colors to install (CI/CD)
  • 3D: colored 3D models for THT resistors
  • Blender export:
    • Better default light
    • More light options
  • Datasheet download: now the warnings mention which reference failed.
  • Plot related outputs and PCB_Print:
    • individual_page_scaling: to control if the center of the page is computed
      using all pages or individually.
  • Plot related outputs:
    • All outputs now support scaling.
  • BoM:
    • Support for extra information in the Value field.
      Currently just parsed, not rejected.
  • PCB/SCH parity test:
    • Check for value and fields/properties.
  • SCH print:
    • Support for title change
  • VRML:
    • Option to use the auxiliary origin as reference. (#420)

Fixed

  • Makefile: don’t skip all preflights on each run, just the ones we generate
    as targets.
  • KiKit present: problems when no board was specified.
  • Datasheet download:
    • Avoid interruptions when too many redirections is detected
  • PcbDraw:
    • KiCad 7.0.1 polygons used as board edge.
  • PCB Print:
    • Interference between the visible layers in the PRL file and the results
      when scaling.
    • Problems with images in the WKS (KiCad 5/6)
  • Diff:
    • Problems when using an output and no variant specified.
  • PCB/SCH parity test:
    • Workaround for bogus net codes generated by KiCad
  • 3D Models:
    • Problems to download KiCad 7 models
    • Added workaround for KiCad 7 failing to export VRMLs for PCBs using paths
      relative to the footprint.
  • VRML:
    • ref_y coordinate not used.

Changed:

  • Some R, L and C values that were rejected are accepted now. You just get a
    warning about what part of the value was discarded.
7 Likes
2

This topic was automatically closed 90 days after the last reply. New replies are no longer allowed.