KiBot, fabrication and documentation automation

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KiBot is a Python script that can be used to automate the generation of fabrication (gerbers, drill, etc.) and documentation (BoM, PDF, SVGs, 3D model, etc.) files.
In addition it can run the DRC and ERC automatically.
It can be integrated to CI/CD workflows.

The script uses other scripts to achieve some of the functionality and supports KiCad 5, 6, 7 and 8.
Currently you can:

  • Run the ERC
  • Ensure the XML file used by KiBoM is updated
  • Generate the BoM (using KiBoM or an enhanced version of it that is part of KiBot). You can also consolidate parts from multiple projects.
  • Include components costs in the BoM using KiCost.
  • Print the schematic to a PDF, SVG, PS, DXF or HPGL.
  • Generate netlists in classic or IPC-D-356 formats.
  • Run the DRC
  • Ensure all zones are refilled.
  • Generate the gerbers (and all the other formats of the Plot menu SVG, DXF, HPGL, etc.). Including templates for Elecrow, FusionPCB, JLCPCB, P-Ban and PCBWay.
  • Generate the drill files (both excellon and gerber format supported, including the PDF maps)
  • Generate the position files (including rotation corrections and support for XYRS formats)
  • Print selected layers to a PDF/SVG/PNG/EPS/PS (what you get from the Print menu)
  • Export the 3D STEP, VRML, FBX, OBJ, X3D, GLTF, STL or PLY for the PCB
  • Create a 3D render of the PCB, using KiCad or Blender (high quality)
  • Generate images of how the PCB will look using different solder mask colors (using PcbDraw)
  • Generate an interactive mounting BoM in HTML (using InteractiveHtmlBom)
  • Export the PCB in Gencad format
  • Update KiCad 6 text variables (dates, git hashes, etc.).
  • Generate QR codes for the schematic and/or PCB.
  • Generate a report of the project, including information about minimum sizes, drill sizes, stack-up options and images.
  • Generate compressed files (ZIP, RAR or TAR) containing selected outputs
  • Join PDFs to consolidate documents.
  • Download the datasheets (using the URLs in the datasheet field of the schematic components)
  • Download 3D models from EasyEDA.
  • Generate a Makefile allowing to execute steps incrementally (i.e. only the affected stuff is redone)
  • Generate webpages to browse the generated files, take a look at this example
  • Compute the differences between two PCBs or schematics. Also show it interactively using KiRi.
  • Collect information about the environment and tools used during the process
  • Copy the 3D models of a project to some destination, also create a PCB adapted to use the collected 3D models.
  • Generate web pages showing how to assemble the PCB (using populate tool)
  • Generate web pages to present your project.
  • Panelize the PCB (using KiKit)
  • Create stencils (both steel and 3D printed, also using KiKit)
  • Generate a PCB and/or schematic with the variants applied.
  • Generate web pages to browse the schematics and/or PCB using KiCanvas
  • Create and update stackup drawings (also the tables from KiCad)

For an example visit the Spora demo repo

Implements assembly variants, allowing:

  • Mark not fitted components with a cross in the schematic
  • Mark not fitted components with a cross in the *.Fab layers of the PCB
  • Remove solder paste from not fitted components
  • Remove adhesive glue from not fitted components
  • Exclude components from the BoM (also mark them as DNF and/or DNC (Do Not Change))
  • Exclude components from the interactive BoM
  • Remove not fitted components from the STEP file
  • Exclude components from the position (pick & place) file
  • Change any field according to the variant (i.e change the component value)
  • Change the 3D model/s

Currently three mechanisms are supported to specify variants: KiBoM, KiCost and IBoM styles. But this is also implemented as plug-ins, so more styles can be added.

In additions you can separate multi-board PCBs that uses the KiKit mechanism using variants.

For more information about variants visit the demo repo

All the output files are generated by plug-ins, so the script can be enhanced without needing to know all the internal details.

Currently you can run it on Linux and on CI/CD workflows like GitHub (docker files containing KiCad and all the supporting scripts are available). Some users succeed using Windows (using WSL or docker), but the setup is more complex. Most of the outputs can be used on plain Windows, but some really needs a Linux style environment.

I’m looking for collaborators to support Windows and MacOSX.

Changes in 1.7.0

Added

  • New preflights:
    • erc: a replacement for run_erc when using KiCad 8.
      It can generate ERC reports not only in plain text but also HTML, JSON and
      CSV.
    • drc: a replacement for run_drc when using KiCad 8.
      Also supporting multiple formats and with a modern separation between
      unconnected and warnings.
    • update_footprint: updates one or more footprints from the libs.
      Useful for external QR codes, logos, etc.
    • draw_stackup: creates a nice drawing for the stackup
    • update_pcb_characteristics: updates the text you get from Place →
      Add Board Characteristics, so you don’t need to remove it and place
      again.
    • update_stackup: updates the text you get from Place →
      Add Stackup Table, so you don’t need to remove it and place
      again.
  • Global variables:
    • str_yes/str_no: to finetune the update_pcb_characteristics preflight.
  • Internal templates:
    • ExportProject: creates a ZIP file containing a self-contained version of
      the project. All footprint, symbols and 3D models are included.
  • Filters:
    • Now the var_rename and var_rename_kicost filters can be used to change
      footprints using variants
  • Quick Start: D/ERC are also included for KiCad 8 (with dont_stop: true)
  • Navigate Results: Includes the new D/ERC
  • SCH Print:
    • Option to specify a custom page layout (WKS)
    • Workaround for people using backslashes (i.e. Windows+WSL)
  • PCB Print:
    • Support for (undocumented) KiCad 8.0 worksheets (20231118)
    • Control over the LAYER KiCad variable used in worksheets (layer_var ops)
  • Internal BoM:
    • Colored rows for HTML and XLSX
  • Render 3D:
    • Added options to control Eco1/Eco2/Drawings individually on KiCad 8

Fixed

  • Netlist generation problems with components on the PCB but not in schematic.
    I.e. logos reaching iBoM output
  • 3D/2D renderers: ranges regex to be more strict. Don’t take things like
    “r1-10”
  • Sch errors are now caught during output runs.
  • Compress:
    • Could make Python ZIP lib crash when adding a dir to the zip root.
    • So it also removes subdirs created by an output when using move.
  • Copy Files:
    • Problems when no target dir and no WKS.
    • Problems when finding the targets (Makefile, copy files, etc.) before
      generating the outputs (or when moved).
  • BoM:
    • Expansion of variables in fields could fail if the KiCad config wasn’t
      initialized

Changed

  • Filters: When we find a component in the PCB, that is not in the schematic,
    and has a malformed reference, now we inform a warning, discard the
    component and continue.
  • PcbDraw: Now handles panelized boards much faster. Previous code was really
    slow for panels and the time increased exponentially.

Changes in 1.6.5

Added

  • KiCad 8 support
  • Panelize: support for all new options (upto 1.5.1)
  • 3D/2D renderers: support for ranges in the show_components and highlight
    options. So one entry can be something like R10-R20. Can be disabled
    using the global option allow_component_ranges.
  • Navigate results: A header and navigation bar.
  • BoM: support for SVG format in the logos.

Changed

  • CI/CD: we now filter some warnings that are always generated by docker
    images when we detect a CI/CD environment. They can be enabled using the
    --warn-ci-cd command line option.
  • KiRi: continue even on corrupted schematics.
  • Variants: avoid W045 on nameless pads. Assuming they are on purpose and not
    real pads.
  • BoardView: Skip footprints with no pads (not just REF**).

Fixed

  • Netlist generation problems with components on the PCB but not in schematic.
  • Filters:
    • _none filter not always honored (i.e. exclude in BoM).
    • Rotation for bottom JLCPCB parts with offset.
    • Rotation angle used to compute the offsets, must be the final angle
  • PCB Parity: components excluded from the board reported anyways.
  • BoardView:
    • X axis mirroring issues.
    • Alphanumeric pads sorting.
  • Present: problems when using gerbers already generated
  • Diff: problems when using things like “origin/main” and add_link_id.
  • Panelize: not able to use external JSON configs.
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