Keep Out Problem with Board House

I hereby certify that I am not simply asking someone else to design a footprint for me.

We are having a problem with the board house producing our PCB.

One of the parts in the design has a footprint containing a keep out polygon. The board house thinks that we want to cutout the board where the keep out is. GerbView shows a proper board, but their software shows a cutout. We opened the Gerbers in Altium and it shows a cutout as well.

We have several footprints containing such a keep out in our libraries. Our purpose is to keep any copper out. How should we define the keep out areas as part of the footprint to stop the confusion?


looks ok at first glance.
Are you sure there are no additional lines/polygon on edge.cuts-layer?

There are none. Simple rectangle.

For me it looks as you defined it correctly (I have never used keep-out in footprints).
From your post I’m not sure if that keep-out shape is included in Edge.Cuts layer gerber file or not.
You should check what is in Edge.Cuts layer. May be there is a bug and when generating gerbers the cut-out shape is inluded in Edge.Cuts.

So the question is why Altium and board hose sees something nonexistent.

The keepout polygon does not appear in Edge.Cuts.

I think the confusion may be caused by the keepout polygon existing in all copper layers.

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Now that the board is basically complete, is there any problem with just deleting that for this board house? Just save it as a different design so that you will have both. Just don’t do a zone refill.

If someone don’t understand that only Edge.Cuts and PTH and NPTH lists defines how the PCB is to be cutout then just avoid him.

They’re usually very good. Already made 10 complex boards with them using Altium. This is the first time we send them a KiCad design.

Have you tried to define the same simple test board in Altium and KiCad and ask them why they interpret them differently (may be the question is to Altium - why it sees something not existing).

Just sent new files + 3D picture of board. Let’s see if they can wrap their heads around that.

I will definitely try your idea next.


It’s an idea I will use if all else fails.

Our company relies on standards for design and fabrication to ensure quality and consistency.
As we transition to KiCad, we understand the need to learn and adjust procedures as required, and that is why I asked the question.

Thank you for your reply, it is most appreciated!


Some here actually seem to prefer Gerbv. There are other gerber file viewers online. You might want to try a few just to see how this renders in ‘other opinions’. Not that there should be ‘other opinions’ in the gerber standard.

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Ucamco are the official maintainers of the Gerber standard. Their viewer is considered definitive (by definition :wink:).

could it be that you’re plotting the edge cuts on all layers?

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Can you share the footprint?
Only the footprint, not the project.

Hi Pedro,

Here is the footprint:

SILVERTEL_AG9903LP.kicad_mod (3.6 KB)

Hi StecklerCircuits,

Thanks for your suggestion, however the keepout polygon does not appear on all layers, and especially not on edge_cuts. It only exists on the 4 copper layers. If you’re interested, you may take a look at the footprint file in my reply to @pedro

I cannot confirm a problem. I placed the footprint on a board and uploaded the board to JLCPCB and it is ok. No weird cutouts, nothing strange. Just a board.
Of course that doesn’t help you, but that’s my 5 cents.
[EDIT] And there is nothing wrong with the footprint either, as far as I see.

Gerbv agrees the files are ok. Visual inspection confirms that.

Btw, Gerbv is complaning about something in the drill files:


As Gerber and I live in different universes, that means naught to me :slightly_smiling_face: