Here are my plot and drill file generation settings:
And this completes the votes of the Austrian jury
Here are my plot and drill file generation settings:
And this completes the votes of the Austrian jury
Thanks @straubm,
We could not find anything wrong with the footprint or the board either.
In the end, we sent the board house the following 3D viewer picture, and they replied âNow I get itâ.
So, in the future weâre going to add a 3D picture to our manufacturing data to avoid misunderstandings.
So they were THINKING the keepout area was ment as cutout (which is not totally absurd for a relais, creepage e.a.) and it was no automated process?
They really take care of customersâŚ
Yes, 6 different e-mails, short and simple English: âNo cutoff inside boardâ didnât work!
Until I sent the picture.
As they say âA picture is worth a thousand wordsâ.
But then, I had something similar with a board at JLCPCB, to my benefit. I forgot to submit the drill file for the non-plated holes for a board. So the mounting holes for the USB connectorâs positioning studs were missing. But the keepouts in the mask layers were there. They noticed that and asked whether there shouldnât be holes. There should have been. Re-send the files? No way. I had to cancel the order and re-order with the correct files. Thereâs light and dark in everything.
Take care!
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