In your position I think I would spend the time to also reverse engineer a Schematic . . . you know all the components (otherwise you cannot place the correct PCB footprints) you know how they are connected because you have the Gerbers. For the benefit of my sanity (and my pocket) I would make a schematic . . .
I don’t really think I need the schematic any more, the PCB is pretty much completed at this point. Aside from the isolated copper islands which I cannot seem to figure out how to resolve. The ground plane is something that I’ve manually created and added to this PCB as I’ve modified certain sections to include components that will be manually soldered to the board.
I’m really not sure why when I place a VIA to connect the top copper layer and bottom copper layers the two aren’t considered as “connected” by the DRC. This is really the only concern that I have for the PCB, I’m rather confident the PCB will otherwise be functional once it’s fabricated.
Whether the jumper is open or not, the two sides should have distinct nets. You’ll have to rename one side.
As for the isolated copper islands I get those too even though Remove Islands is Always. It may be a bug triggered by not having a project file. If somebody else can replicate the problem, it should be reported.
There was also some strangeness with the mounting holes I don’t understand.
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The normal way for KiCad to work is information created within the schematic is used to validate what is created in the PCB layout, by not having a schematic you are making life difficult for yourself and KiCad.
Have a read of this thread to understand some of the challenges that the development team have faced during the evolution of KiCad and why, in my opinion, you should try and make life easy for KiCad so you can get the best out of it.
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Thanks for all your advice and suggestions so far. I’ve gone ahead and corrected that error was well by adjusting the name of the two nets like you suggested.
I thought it was strange that when Remove Islands was enabled, islands were in fact not being removed. I’ve managed to cleanup most of the isolated copper islands by creating a Rule Area that specifies not to fill those sections. This has corrected the majority of the isolated copper islands.
The last three isolated copper zones are pretty large and I figure they should be relatively easy to connect with a VIA; Though for whatever reason I just cannot get this to work the way I expect it to.
I’ve uploaded all the the kicad_pro and kicad_pcb files I have here.
Strum PCB Files.7z (263.9 KB)
Thank you, that looks like a rather detailed amount of information; I’ll give it a read through tomorrow. I don’t think it would be relatively difficult to create a schematic for the PCB, I just know it’s going to be time consuming. I also do not think the schematic should be necessary to connect the top and bottom copper layers in the PCB Editor. That would be a bit of a silly design choice in my personal opinion if that is indeed the case.
Regardless, a complete project is never a bad thing so I will consider reverse engineering a schematic as well.
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I do not agree with this sentence.
It can be the method used by beginner to check if zone will connect everything, but you write it as a rule to be used always which I disagree with. I left connecting GND to KiCad and I’m very happy with it.
Since 1997 till 2017 we used Protel 3. It was able to make connections while filling zones but had a vary big computation problem with it. Protel filled zones by making tracks around other pads and then filling whole area with horizontal and vertical tracks. I always left filling zones at the end as it worked much slower than in KiCad. Let us assume that filling typical PCB took about 10s. But if it happened you to left only one GND via not connected with tracks time was bigger - may be 20s. Time grew with some power of the number of connections left to be finished for filling zones.
At the beginning I didn’t know that and when I had PCB with about 20 GND vias that were not connected with tracks and run filling zones than after 30 minutes I decided to break its work.
The solution was as you write - to have DRC reporting no errors before adding zones to PCB.
So I was doing it this way but I felt compelled to stupidly connect all the GND vias I placed on the board.
With KiCad V4 I have also read that all stitching vias you should connect with tracks manually. But there were info that with V5 it will be working better. So even I made decision to go to KiCad when it was V4.0.6/V4.0.7 I decided to wait for V5 and spend this time on making my library structure and filling them with all basic elements to be used.
Since KiCad V5 you can just left connecting GND net pads to filling zone and with big pleasure I let it to KiCad. I just place GND via near GND pad and connect pad to this via and left rest to KiCad and for other pads I just do nothing.
The main problem here is failure to do a “proper” PCB design with a good GND plane. The GND plane should never have been cut up in so many little pieces.
Failure to make a good GND plane a very common (and one of the biggest) mistakes beginners make, and this topic is explained many times over. So do a bit of research.
For the rest, I don’t understand why this topic has 30 posts. I glanced though it and it looks like a lot of distractions.
No offense but you’ve not really provided any valuable or useful information here I can work from. I’ve done many hours researching across the forum, youtube and other tutorials. If I hadn’t I would not have posted in the forum to begin with. If you have some kind of reference material, please share it and I’ll take a look.
If you’re referring to the multiple locations there are GND Pads/VIAs this is necessary to allow for clean connections of the components to the PCB.
If you’re referring to the amount of tracks on both layers, which evidently is splitting the ground plane to begin with; This PCB is not my original design and was imported from a gerber file. I’ve made some minor modifications, the original PCB had numerous VIAs to stitch the ground plane together. Which is exactly what I expected to do with the 3 isolated copper islands that remain.
If you’re referring to the filled zone, which is now the ground plane; I only just made this zone and filled it. Initially, it was split with multiple islands due to the way some tracks are routed, however I cannot feasibly adjust these to ensure every single section on the filled zone/ground plane connects. This is why I expected to use VIAs to stitch the two layers together and complete their connections but as mentioned this does not seem to make KICADs DRC happy for whatever reason.
Additionally there are only three isolated copper islands left and in my opinion it’s a rather large ground plane, so I’m not sure what you’re referring to about it being “cut up in so many little pieces”. I believe placing a VIA between the two planes should connect the floating island to the other layer, which is already connected and not considered a floating island.
In regards to the amount of posts; People ask questions about the PCB, I assume to better understand the design to in-turn provide assistance to resolve the issue. I of course answered those questions to provide whatever insight I could.
Probably GND is still divided into islands.
What do you expect?
If one copper fill part have connection to 20 GND pads and the other to 25 GND pads but they have no connection to each other do you expect the one having connection to less pads be removed or the one having smaller area be removed. If you think that one should be removed than where is the border number to not being removed. Do connection to 5 pads is enough to not be removed.
As there is no logical reason to select the enough number it was decided that connection to only one GND pad is enough to not remove filling.
Islands having no connection with any GND pad or via are removed. All others are left. But if that what is left is divided into separate parts these are still the islands having no connection with each other.
I’ve already manually drawn tracks between all the GND pads as was earlier suggested; So if the copper is touching one GND pad it should technically be getting a connection to all of them based off these tracks that were created.
As shown below there are no ratsnest lines between any of the GND pads anymore.
From what I can tell it seems like KiCad is not actually connecting the zone to the GND VIAs, or it’s not recognizing that it’s connected. I have a single isolated copper fill on the top copper layer, I’ve followed this zone at every edge, but I don’t see anywhere that would be considered an isolated Copper Island.
It seems to be suggesting the entire fill layer, is now isolated from the VIAs. Which I believe would explain why placing VIAs is not properly stitching these layers together like I would expect.
That said; I’m still not sure why it the copper fill isn’t considered as connected to the VIA below it.
First of all - there is no reason to pre-connect pads or vias on the ground plane. Just having them on the correct net will allow the fill to connect to them. It’s just double (or more) work to route them manually.
But, since you are using PCBNEW without a schematic, I’m 99 44/100% sure that your problem lies there. There is some inconsistency in the netlist that is invisible since you don’t have a schematic.
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The way this PCB representation is made in KiCad is very problematic. It doesn’t have footprints at all which would have copper pads (it has only NPTH footprints, mounting holes). Everything is done with vias and graphic polygons. KiCad understands zone areas to be connected when they touch pads. Because you don’t have copper pads at all, zones aren’t really connected. See How to create a power plane (using zones) for further information. Actually, I don’t understand how your zones have been filled in the first place. Maybe I have to dig deeper.
BTW, your 7zip archive includes kicad_prl file. That’s the “project local” settings file which saves the state of the GUI and shouldn’t be shared. It only creates confusion because now you had hidden many objects and when someone opens the project there are for example no visible footprints.
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OK, now I understand better. Unintuitively, if there’s no pad at all for a certain zone, it is filled even when it forms a non-connected island in itself. If I add one footprint into your design with one SMD pad in the GND net and re-fill zones and re-run DRC, the island warnings are gone. This means that all areas are connected together in one way or another. (This, of course doesn’t yet make the design OK – that much has already been said.)
The minimum I can recommend is to create and add actual footprints for all components. Otherwise you are using KiCad totally in a way it’s not intended to be used and are in the risk of undetected problems. Designs without schematic are supported but designs without schematic and footprints haven’t even occurred to developers’ minds, I guess.
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This reminds me of the time I wasted with auto routing when I first started. Kicad 4? After finally getting it working, I never used it.
This looks like a simple enough board that recreating the whole stack from scratch would have been the quickest route.
Would it be that hard to ‘back create’ over top the gerbers?
In the end, you want a worry free board that you can be confident works and nothing is missed.
Indeed. I missed that earlier.
Agreed. Cleaning up after the autorouter for projects like this is often more work then routing the PCB “properly” in the first place. It’s a lesson that many beginners apparently have to learn “the hard way”.
But in this case it is probably more complicated. I am guessing this is made without a schematic, and all the nets have been named manually in the PCB editor. (Indeed, a search though previous text in this thread confirms this).
And there are other things very wrong too. Such as for example this stacked mess of objects below. All “pads” seem to be such a stack of objects. It looks like some sort of import from another program or Gerbers, and then modified.
I don’t want to put much time in this. I also have not read all previous posts in this topic.
Just looking at the layout (ignoring the fact that there is no schematic diagram) I think there is probably no point to having many of those copper islands, even if they were grounded. I would delete them.
My most recent design is a 4 layer. For layers other than the ground layer, I put down large contiguous areas of ground plane where there were large blank areas to fill. But I do not try to put ground copper into every little space…
I do not mean that all designs can be done like this. Some designs may have critical high frequency signals running around and need max shielding. But I bet that this design in question is not one of those…
That sounds like the ideal situation! 
Sorry for the late response I was rate limited due to the amount of responses I’ve been sending. I did notice that when I put a footprint down for a mounting hole VIA, it ended up connecting this to the ground plane.
I’ll go through and create a schematic as well as update the PCB with the necessary footprints. Cheers for all the advice everyone. 
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There is a good article by paulvdh in the FAQs here about the ideal method to create PCBs from Gerbers.
Well worth a read.
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