Is there already an implementation for castellated holes?

I have done some research about castellated holes. I obviously found several posts but they are from 2020

And than I found this more recent refence

I understand how to make them myself, that I must check for settings with my pcb supplier and that I must turn DRC off during routing 'n all (or temporarily relocate the edgecuts).

But I was still wondering if somebody already designed usable footprints which I may use. I also fear I accidently may do something terribly wrong during routing without DRC and lose many of these €

I am also curious to the latest news about Kicad’s implementation of castellated holes.

So… what’s the latest?

Regards,

Bas

Euhm, no. If you followed that 6.99 link to gitlab, you could have seen the issue was closed 10 months ago. I just checked and KiCad V6.0.10 also has a Pad Property / Fabrication Property / Castellated Pad

One of the reasons I switched to KiCad (7 or 8 years ago) was the quality of the Footprint Editor. It’s quite easy to make custom footprints. But still, I think I like the Idea of a few KiCad libraries for castellated holes. I imagine something similar to the single row headers in different pitches (1mm though 2.54mm?) but how useful would it be? Castellated pads are most often used on several sides of a PCB.

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We just had another question about castellation, and I revisited my FAQ article. It was never completed: I thought I should add some example footprints files and more information about especially v6, but because the situation seemed to be in flux, it was neglected.

Writing generic but yet specific instructions is a bit problematic because the solutions for remaining DRC problems require custom rules, and they depend on the exact situation. I could use some real world needs / example design files which show the specific problems of the users. Then I could find out how they can be solved.

Thanks for the answers.

I am playing a bit around. I read somewhere to place SMD pads over the holes like this. I used normal 2.54mm THT connectors and placed a testpad of 1.7mm over it. The silk layer is unwanted. And I believe I need to specify the net for every one of them.

It is clear that this is not the way :sweat_smile:.

I checked with my supplier. And I really need to make me my own footprints for this. Mine don’t look like these ones… :smiling_face_with_tear:.

When I tinkered one together, I’ll check back here.

Kind regards,

Bas

P.S. the option to check the castellated holes work well for routing :wink:

Few minutes later…

I made a foot print with 2 pads. I gave them the same number. The square must be an ‘edge connector’. This I figured out by trying things out. The footprint editor shows different things than pcbnew…

The round pad is slightly smaller than the hole and is a thru-hole type.

afbeelding

Looking at the board, it looks okay to me. The hole diamater is 0.763mm which is larger than the absolute 0.6mm mininum of JLC.

I was thinking of making more of these things for every pin amoun up to 20 like the rest of the connector. But I am guessing a script can do that faster than me? Are there tools for this?

Kind regards,

Bas

EDIT:
Forgot the pad on the other side…

You do not have to add SMT pads. you can also just set the THT pad to rectangle or rounded rectangle. It does not matter much how much the pad sticks out on the outside, as that is milled off anyway, as long as it’s less then 2mm or so.

The Footprint Editor also has a quite convenient way to first copy the pad properties of one of your pads to a fictious “default pad”, and then you can copy that to others, it is also used when creating new pads. This makes it easy to have a bunch of pads in the same form. Always be aware of the other layers too, when using SMT pads for example you want to disable the paste layer.

Don’t pay too much attention to that picture you showed. It’s just for indicating a minimum width and nothing more. I would always make the pad a bit wider then the hole. the main problems for production of a castellated hole is the forming of copper burrs, or the copper tearing out of the hole. If you make the top and bottom pads wider, then the copper of the hole is also held on a bit tighter, especially in the corners.

Straight forward process…

New Footprint
• No Pads
• Add one pad and set parameters
• No Silk/Fab…
save

Place Footprint on PCB and make Array and change pin Numbers

Naturally, tweak Copper/etc as required for best design/mfg per vendor rqmts

Thanks. I think I got it.

It is now one rectangular pad of 1x2mm. It routes

And looks okay on both sides this time.

I have another question though somewhat unrelated. For symbol I used a male 01x01 connector. When searching for footprints, I cannot find my hole as long as this box is checked

I know why this is, so my question is: in the footprint editor… how do I ‘flag’ my castellated hole as a ‘connector’ type so it shows up on the footprint list when that filter box is checked. This plagues me when finding al my custom parts.

Also… why precisely do we want a halve hole in the first place? Can it not be without a hole?

Regards,

Bas

That screenshot looks pretty much like I would do it, (although I’ve become addicted to rounded corners (for no particular reason).

For the Library search: Footprint Editor / File / Footprint Properties, and then either the Description or Keywords fields. I’m not exactly sure how the fields interact with the filters. You can look at one of the existing footprints as an example of how it works and experiment a bit.

I’m not really sure, but I think it is to improve reliability and inspection. QFN parts are also only soldered on the bottom, but I think that it’s regarded as an bonus if the sides are also wettable. It also allows for a bigger tolerance in the amount of applied solder paste, and this in turn allows for small deviations in distance between the two PCB’s. The solder fillet will adjust during soldering, and extra solder will fill the fillet in the half hole. If there is only solder on the underside, then inspection and reliability control becomes more difficult. You may have to use BGA like techniques.

At least the manufacturing technique must be different. Plated edge is completely different than the plated hole. I’m not sure which one is more difficult or costly.

One reason to use holes is to fit the edge holes for some standard width so that the castellated board can be soldered to pin headers, although extra holes inside the board outline may also be used for that if there’s enough room.

It makes hand assembly trivial, compared to a purely under-device pad.
Also, due to the large solder filet, it’s a very strong connection, which is important due to the size of the modules that typically use these pads.

Oh, I thought the question was about hole vs. edge plating, but edge plating wasn’t mentioned. Plated edge pads might do the trick, but pads only under the board doesn’t offer a good chance for manual soldering, as was mentioned.

I don’t this is a good solution, it’s just a hack to get rid of the DRC error, if I’m right. If there are DRC problems which you can’t get rid of with the “castellation” attribute, they should be handled by custom rules.

I just posted this STEP file for Arduino Nano_BLE (screenshot below)

No DRC errors

I’d think that if the castellation attribute does not work as intended, it may be worth a bug report.

First, the comment was about the extra SMD pad. Second, the attribute can’t do just anything a user might want, like help with filling zones. On the other hand zone filling may be problematic even with custom rules.

The zone filling worked. Ground plane was tied to the castellated pad