Sorry i could only upload one image per message.
This is the measured voltages. The CLK will be in the real life from the Raspberry Pi and I’ll measure the voltage at the voltage divider resistor.
Hope it is understandable.
Simulation
Simulation
Are you able to upload a ZIP of the project files so we can take a look? Or does it not let you because you’re a new user to the forum?
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Should be able too now.
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With 3 bits there are 8 combinations of input voltage at the outputs of the counter. Can you not run the simulation with those 8 combinations in sequence?
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That’s what he’s trying to do. The stairstep is the “DAC-ed” output of those 3-bits, but he’s getting inconsistencies and at least one step is missing in each cycle through the counter. There’s so much that can go wrong here, I think it’s safer if we looked at the project in its entirety.
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Attached you will find a 3-bit up/down counter as a subcircuit. The counter is made by an XSPICE state machine (ngspice manual chpt. 12.4.18). The internal event nodes are translated to analog inputs and outputs.The circuit in the *.cir file will run with standard ngspice. The subcircuit may be attached to an appropriate KiCAD symbol which has clock and up/down inputs and three outputs.
state-machine-3b-count.cir (1.2 KB) state-3bit-count.in (537 Bytes)
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OP, is it a requirement of the course or something that you show a simulation run with a graph or do you just need the 8 resulting values at the node indicated? Seems like something you could work out by hand for the 8 combinations, or use a spreadsheet.
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You should search for a circuit diagram of a synchronous counter.
You are running your counter asynchronously, which heavily depends on internal delay times and may deliver unexpected results, if not done very carefully.
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The 8 combinations would also be easily simulated just with 3 rectangle sources of differing period (1,2,4). No need to use counters as the input for that.
And then one can check the digitial side separately if it gives the expected output sequence on a given input. That is kind of what i hinted at above. If one divides systems into multiple subsystems with defined interfaces then one can look at each subsystem in isolation. This makes an iterative development process a lot more viable.
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Hello!
Thank you for your answer. Yes i attached the whole project what i can managed to do until this. I’m beginner at Kicad but you are very helpful thank you for that
Best regards!
Hello!
Thank you very much! I’ll look into that and try to run it with ngspice!
Hello!
No it is not requirement to see it graphically but it would be plus.
I choosed Kicad because it has a very nice GUI for ngspice and i can easily build the circuit and later if i want to change something i can easily change it as well.
Best Regards!
Hello!
Okay i’ll try it with Synchronous counter!
Best regards!
Well if you analyse the circuit with the help of Messrs. Kirchoff, Thévenin and Norton, you can derive a formula for the resulting voltage, using only pencil and paper. Here I cut to the chase and show you the spreadsheet result since you want to see a nice graph.
Edit: fixed an error in formula.
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WoW!
It looks very nice!
Thank you!
Hey, Daniel. I looked at your project and it seems like what @holger stated above is indeed the issue. Not only is this true, but the D-FlipFlop subciruit you found (link here) is using default-parameter BSIM3 MOSFETs to produce the logic gates inside. I can see a bunch of problems with those kinds of NAND gates connected in the criss-cross pattern required to produce a flip-flop. I can get it to run stable in a different simulator, but the edges are very messy so something is definitely wrong here.
I suggest using the behavioral model @holger posted above. Like he said, you need to create a symbol to utilize his .subckt model within your project. Based on your initial project, it seems like you have a good handle on how to navigate the nuances of KiCad simulation so I think this will also be something you can figure out without too much hand-holding. HINT: the first step is to extract his .subckt / .ends section into its own .LIB file to reference and use with your symbol.
Also, what physical IC are you planning on using for the counter and also what is the part# for the MOSFET you want to use? The way your MOSFET is connected is going to depend heavily on its threshold voltage. Therefore, the specific part is important and you would need to find an exact model for it so your simulation output matches closer to the real life output. Alternatively, may I suggest connecting the output like this instead?
The output will switch between 3.3V and 1.65V. If you need it to switch between 0V and 1.65V then you need to do something similar, but with a P-channel MOSFET. This configuration is less dependent on threshold voltage and you won’t get much of your output swing within the MOSFET’s linear region of operation. Please ignore these comments if I’m not correctly assuming what you’re trying to acheive on the output.
Finally, a couple general suggestions.
1.) Define the rise and fall times for your voltage pulse sources. Don’t leave them at 0.
2.) If you’re primarily doing simulation, use “meg” instead of M on your schematic so you don’t have to keep checking the box in the simulator to auto-fix it for you.
3.) Be careful with your voltages. You’re powering your counter with 3.3V, but your clock source is 5V. The simulator won’t show any errors or smoke coming out of your counter, but you will likely smell it in real life!
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BTW, note that this D to A converter design relies on the outputs of the counter generating 0V for zero, and Vdd (or at least a known fixed voltage) for one. If the outputs are CMOS, this will be the case, but if you have chosen say BJTs for the counter implementation, then this will not be the case.
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Hello Ste!
Your advices are really helpful, and i can not thank enough for your suggestions.
I downloaded the file which @holger posted above and i copy pasted the .subckt part to a new file with .lib extension. I managed to make a component that matches to this library, or i tried to.
Firstly i only want to test and make the circuit in Kicad.
I’m really new on this filed of science. And in @holger file there is a bunch of model. (d_pullup, d_pulldown, dac_bridgem adc_bridge). Cerainly i got a bunch of errors in the simulation, and i think because Kicad miss these models .
I know that the name follows the subckt and after that there is the pinouts.
In this subckt the pins are: updown, clock, out_b2, out_b1, out_b0
i searched in the ps reference guide and i found the .model section but i don’t know how to utilize this. I know i miss a lot of knowledge sorry for that, but we didn’t study this type of field at the university and i search a lot to grab the fundamentals.
I know i have to create components which matches with the .models which the file calls. But I’m sure i miss something.
My questions are:
How can i read how the .model component looks like from the file which @holger sent?
What these line does:
Xcount ud c1 ob2 ob1 ob0 3bcounter
.model state 2 d_state(state_file = “state-3bit-count.in”)
Again thank all the help, you already help a lot and suggested me some really handy information THANK YOU!
In real life i would like to use sn74ls93n 4bit binary counter IC and for the MOSFET i do not certainly know at this point but i’ll figure it out!
PS: I attached picture about the component i created for the subckt and the lib i created for it. Do you think it is correct for this type of subckt?
If you can take a look and help a little bit more i would really appreciate that! If you don’t have much time for this no problem ! You already helped a lot!
Best Regards,
Daniel
Schematic
Simulated error1
Simulated error2
Simulated error 3
The subckt .lib file
Note what I wrote above about about output levels. The LS93 is really old and BJT logic. At least put a CMOS buffer in between so that you get the full swing between 0 and Vcc for the levels to the resistor tree.
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