I’m not sure if I have understood the situation correctly, either, but I think they aren’t using circles so that they could be replaced. Maybe Gramotey can give a more detailed picture of a problematic plane. It’s difficult to tell what the original screenshot actually depicts (only the outer layers or the planes?).
I am not sure either.
My best guess is that the via’s poke 115000 holes through the zones in the internal layers, and KiCad dutifully generates zone boundaries with a clearance and generates 50+ segments in the gerber for each via hole.
If there were “negative Gerber layers” in KiCad, you could just use a round aperture and use that to stamp out round holes through the GND plane.
A dirty trick would be to use the solder mask layer (or similar) and then instruct your PCB manufacturer to put that in copper on an internal layer.
Having a gerber layer “inverted” is likely a single line of text in a gerber file, with a bit of research this can probably be inserted manually. Gerbers are also just readable and editable text.
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Sorry about confusing communication, but you said
I assumed you are using version 5.99 (the unstable development version, nightly builds) because 5.1 doesn’t have “max deviation” as far as I know. Anyway I explicitly said
You still didn’t show or tell what the plane layers actually look like in close inspection, so I can’t tell if these are useful tricks, but if they can be used, you can copy the project, open the copy with version 5.99 and plot the problematic layers from there.
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UPD! Yes somehow I ended up clicking on the wrong downloaded installer! Geezuz
This is what I thought I was using 
Downloaded and installed yesterday 2021-02-19… from ‘testing’ @ CERN… hmmm…|
Can you please post me the explicit link, maybe I am not doing something right…?
That’s the nightlies. If you have installed it alongside 5.1, is it possible that you have started KiCad from the wrong Start menu? Or do you have only one Start menu folder for KiCad?
If it really was the “testing” folder it’s for version 5.1 bugfix nightly builds. The “nightly” folder is for the development version.
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UPDATE
Yeah… I didn’t see any “smoothed polygons”… :((
I will keep trying few things. Plotting to PDF or SVG (that for sure have curved lines as objects) and then converting to Kicad.pcb might work…?
“Smoothed” is a technical term here, it doesn’t mean they look smooth. What I see in your screenshot is pretty what I would expect with coarse smoothing. If you have that “Smoothed polygons” selected, your file is already as small as it gets. The only thing which could be changed is maybe minimum width for the zone. The polygons around the vias aren’t regular shape, they have extra corners. Maybe playing with minimum zone width would get rid of them.
Certainly not. KiCad doesn’t use curved lines for polygonal shapes (zone fills), although it’s in plans (and even then I don’t know if it will be reflected in gerber export).
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Thank you so much!
Ok. Returning to the OP, how do I make the “negative” from my ground planes?
Again, I am a newbie, so a level of elaboration will be appreciated
That’s not possible in KiCad. Using negative plotting for gerbers isn’t a standard way to do anything, there may have been historical practical reasons to do that but not nowadays, and KiCad doesn’t support it. In any case it wouldn’t help if negative plotting would only reverse the “color” of the items because there would be the same amount of data.
If reducing the amount of data by using the new zone filling algorithm and simplifying the arc approximation didn’t help, I don’t think there’s anything else KiCad can do for you. KiCad export algorithms should be radically changed first to handle round holes in filled areas as flashes, or to draw them with arcs instead of segments.
But I’m still interested about the problem and possible solutions. However, you still haven’t provided much information.
- How small you need the files to be (and why)?
- How large/small they get with different arc approximation values and zone filling strategy (in 5.99)?
- Can you still show a screenshot from gerbview where I can see the internals of the gerber file? Like my screenshots where the wireframes were visible?
- Do you insist having negative gerbers only because of this file size problem?
Thank you @eelik!
- We would like files to be reasonably versatile so that the PCB manufacturer could actually open and check them. At this point, 180 Mb Gerber for one GND plane is a bit much;
- I have been able to get it down to 100 Mb already using your hints, and still working on it. There is hope;
- Will post here in reply as well once I get the most recent fill completed… it takes couple of hours. I am not entirely sure what you mean by “internals” - actual text of the Gerber commands snippet? I will add some more screen shots soon;
- Yes, size is the main problem.
I’m not entirely sure, but I do think that “negative Gerbers” is a part of the Gerber specification itself.
As written before in this thread, it is used for the solder mask layer, where cutouts are made in a sheet.
This is also not true:
With negative gerbers, you can define an aperture, and then “flash” it as a round hole on each via location. Now each hole is 8 straight segments.
I do agree that it’s not supported by KiCad. Just maybe you can (ab-) use the solder mask layer and convince your PCB manufacturer to plot it as a negative copper layer.
But it’s outside of KiCad’s normal work flow and you’re on your own in doing so.
I mean the “wireframe” like in the screenshot in my post above. Is it the simplest possible? If it is, there’s hardly a way to make the file any smaller.
In the end it boils down to “gerber code for one via” 115000 times. If one via takes, say, 250 bytes, it will be about 30 megabytes. That doesn’t include the overhead of everything else in the file. If you want to know the details:
- Vias themselves are flashed, one via takes one gerber line:
X173800000Y-86100000D03* - If you have so coarse zone filling that the clearance hole is an octagon, it takes basically 10 similar lines, 8 for the octagon and 2 extra for connecting the polygon hole to the rest of the polygon.
It’s even theoretically impossible to go below that with the current gerber generation algorithm. The only way by changing the algorith would be to replace the 8 octagon lines with one arc (which is basically covered by the wishlist issue above). Even using circular apertures with “clear” polarity for clearance holes wouldn’t then help much more.
We are talking about two different things. “Clear” polarity is a way to take off from an item flashed with the default dark polarity, as you say. “Negative” in the export dialog means negative colors, and likewise in the “negative gerber”. Basically a “negative layer” could be done using different algorithm, thus saving bytes. But it would be easier and better to create normal layers with different algorithm.
I don’t see how the mask layer “negativity” would be relevant. It’s created with the same algorithms. Graphics in the layer is graphics in the gerber, it’s not reversed. The “negative” comes in interpetation when it’s compared with the physical board.
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@paulvdh @eelik Thank you Gentlemen,
I think at least I’ve got this down to some manageable / open-able condition. The GNDs are identical so I am only sending one to the PCB manufacturer. They are 128Mb and open quite okay in Gerbview. I really appreciate your help and discussion, your hints has helped me to optimize the settings to a plausible outcome (TBD, submitted to review now :))
I’m really curious, what is that supposed to be? Some sort of antenna? Capacitance matrix? EM field detector?
Right you are @qu1ck!
It is a radiation detector array for proton cancer radiotherapy.
… hopefully it will be able to make it more affordable…!
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This is mostly theoretical, as KiCad does not support arbitrary “negatively defined” items to be defined by their users. It’s just some stubborn misconception.
First:
I had a look at the (unofficial source) https://www2.pv.infn.it/~servel/rc_images/gerber_rs274xrevd_e.pdf
And from that file:
Extended Gerber Format, which is also called RS-274X, provides enhancements that handle polygon fill codes, positive/negative image compositing, and custom apertures,
So it does support negative features, and apparently does so in several ways for different sorts of features (flash codes, whole images). In the header(line 6) of the solder mask file I used below is a line that (probably) specifies the whole file is to be inverted:
%TF.FilePolarity,Negative*%
Sure, if you just define gerbers as being “negative”, then file size does not change. However, the idea about the ability to use negative features in Gerber results in being able to draw the things that are not in the output, instead of drawing the image itself.
Have a look at this part of a gerber file generated by KiCad:
It shows some defined apertures, which are then flashed on the solder mask.
First the apertures are defined, and after that each hole in the soldermask is just a single line in the Gerber file. Below is a small excerpt of the Gerber file, First is specified that aperture “D30” is being selected, and then a list of coordinates on which locations that aperture is to be flashed.
D30*
X137160000Y-96520000D03*
X139700000Y-96520000D03*
X142240000Y-96520000D03*
X144780000Y-96520000D03*
X147320000Y-96520000D03*
X149860000Y-96520000D03*
X137160000Y-99060000D03*
Now compare that with the gerber for the orange GND plane in Gramotey’s screenshot:
For each hole in the GND plane, the GND plane is directed around each via with a low poly approximation of a circle. In this case each hole is constructed out of 10 straight line segments, and thus 10 lines of Gerber code.
If it were possible to use the negative gerbers in the GND plane just as in the solder mask, then each group of 10 line segments could be replaced by one aperture flash. This will result in a reduction of filesize of 90% for all the via holes. And for 115000 holes that would save more then a million lines in the gerber file.
If file size is that important then you could hack into the files, either with a text editor or by writing a script, and then remove a lot of the internal structure of the GND plane, and replace it with the negatively defined features such as in the solder mask layer.
Normally via’s are covered by solder mask and therefore not in the solder mask layer, but probably are if you turn of the “tented via” option during gerber creation.