I do have three GND layers in the board, and Gerbers generated are 175 Megabytes each.
Normally what happens is that in the software to plot, there is option to plot as ‘Negative’ and not ‘Filled’.
Gerbers are intended to be used by a CAM software. All layers are seen from top, even the bottom (or back) layers. So a mirrored output is no an option.
They same for the negative plot. Some layers represent a positive view, for example the copper layers. Other layers, like soldermask ones, are negative.
Try other plot formats like pdf or svg to get mirrored and negative layers ready for printing.
It would be interesting to see what kind of design leads to gerber file size that large. Some CAM software could even choke on that.
Use a gerber viewer which can show all items as in outline (wire) mode; KiCad’s gerbview can sketch polygons, apertures and lines. Then you can see what details the file consists of and what may be the cause.
Yeah the design is pretty crazy repetitive pattern, we have 115,000 through vias, and each of three ground planes has circles to get those through.
I’m curious to know which manufacturer is willing to make this for you.
Haha why the one in China 
So the files are big because the project is very complex, no surprises there.
There was a time when we were charged per via by the fabs, this job might bring that back
Um, no. The project is actually dead simple (bar generation of the pattern we need). The rest of the project bar three GND planes is 18 Mb. There are only ground planes that we have problem with - and I am arguing because they are filled.
My question is, does someone know how to make “Negative” planes in KiCad / PCBnew?
Again, I am a newbie, and not an electronics engineer… but I catch on pretty quickly.
Any actual, useful suggestions other than using paid software? And yes, other software can do it (from what I have been able to read up so far) and that is how (as I understand) professionals do get away with what I am dealing with here.
Thanks!
What do you mean by “negative” here? Explain exactly.
The best explanation I found here. I think in my case, negative internal layers will be the answer. I just don’t know how to achieve it in Kicad now…
Would it really help? The patterns would be the same anyway.
The real “problem” here is that KiCad doesn’t use “clear polarity” circles for via clearings in the zones. Each hole is traced with a bunch of small consecutive lines and there are many of them.
In version 5.99 you can choose the new zone filling method which doesn’t have those extra segments which effectively double the amount of the needed information; in your case it would practically reduce the layer file size by almost 50%.
In 5.99 you can also play with the max deviation value and get more coarse approximation of a circle, if it’s enough for you:
That would also reduce the file size by huge factor if it doesn’t need to be exact circle.
Simple in concept sure, not so much for fabrication. Each drill is only valid for something like 30,000 hits (lower decades ago hence charged per via)
Also with a large amount of material removed, is it structurally sound?
Crazy PCB for sure
What I understand from that ospark link:
I am not aware of KiCad being able to generate these files.
Is the only reason you want to do this because of the filesize?
Why worry? 175MB is quite big for a Gerber file, but it’s nothing exceptional for a less then 20 year old PC. Cost of storage these days is a few dimes per Gigabyte, and you can store 8 of those files in a Gigabyte. some people still have relatively slow internet and it may take a few minutes to upload such files.
With a bit of luck your repetitive pattern compresses well.
Negative Gerbers were a thing when you make your own PCBs.
I have never tried it but in my old Protel 3 I could have 16 positive defined copper layers and 4 negative defined (named Internal Planes). Everything you draw on them is to be removed by the etching process. As filled zones are there made by lot of horizontal and vertical tracks (all the same, specified by you width - I used 8 mils) such solution is good for power layers - better to have 0 or few tracks instead of thousands (filling GND zones frequently took Protel many seconds so it was always the last step in design - absolutely no comparison with hitting ‘b’ in KiCad).
I suppose that gerbers are then generated as negative of your work to get the positive gerber.
It is only one what I associate with negative gerbers.
Thank you! That is indeed absolutely relevant. We did already adjust max deviation value, not a whole lot of help.
How can I choose this new method??? Can you tell please, haven’t seen it. Well, I had just updated…
Yes, no problems at all. With 3 layers of copper, vias filled and pads on the surface, it’s a tank.
I’m not sure what exactly is eating up those megabytes.
Instead of using circles and trying to round it down to a coarse approximation, it may be better to just use Octagons or hexagons.
KiCad does not allow you to put footprints or pads on inner layers.
A possible workaround is to work with multiple projects, and then manually combine the gerber layers. Gerber layers are pretty much equivalent to each other. So you can have two projects, each of a double sided PCB and then mix up the gerbers to get a 4-layer PCB. Just make sure the coordinates between the two projects match up.
For the pattern, you can create a single footprint with a small rectangular section of your pattern, and then just create an array of those footprints in Pcbnew.
It is a hackish contraption but I think this can be made to work. If you want to go this way, first do a few experiments on a small mockup before you attempt the whole PCB.
Just curios: How big is this PCB? Can KiCad handle it well, or is it extremely sluggish? (And why do you want to make something like this in the first place, but I’m not sure if I want to know the answer to that).
