Observe the following (simplified!) use case in KiCad 8. One PCB with a led, button and resistor, the other with the battery. In order to produce it in one go (cheaper) it is designed as one PCB that is to be manually separated after production. To that end i used a keep out zone. There are two (hierarchical) sheets and a PCB:
So far, so good, the ERC produces no errors (it does not notice that i reversed the led ). But we see that two âwiresâ are failing. This is because we make use of the power symbols GND and +3V which are global symbols of course. Running the DRC also reports these are errors:
** Found 2 unconnected pads **
[unconnected_items]: Missing connection between items
Local override; error
@(115.9750 mm, 68.6300 mm): Track [GND] on B.Cu, length 2.8355 mm
@(116.0000 mm, 48.7300 mm): Track [GND] on B.Cu, length 22.5050 mm
[unconnected_items]: Missing connection between items
Local override; error
@(125.8300 mm, 71.1700 mm): Track [+3V] on B.Cu, length 1.6546 mm
@(164.6500 mm, 57.3750 mm): Track [+3V] on B.Cu, length 42.5450 mm
But the PCBâs are meant to be stacked on top of each other, so there is in fact no real problem. The question is, how do i tell the board design program this? So far i thought of:
Ignoring the errors, but this is not pleasant for in the real situation these connectors are much larger with many power rails and multiple stacked PCBâs.
Remove the power symbols and use local labels with the names GND, +3V etc on each sheet instead. But this reduces the power of the ERC somewhat, and it feels like a hack.
What i would really like is define a component with the multiple footprints over the different PCBâs that does this connection for me. Or, if that is not possible, draw some âinvisibleâ wire on the PCB.
But it could be that i am missing something very obvious here. Thank you for any tips.
The short / simple answer is that this is (still) simply not supported. KiCad (officially) just supports one PCB per project. As a result, any solution will be some kind of workaround.
In one of my projects, I have a backplane with 40 pin connectors that connects other separate projects. For those I have made a custom schematic symbol for the connector, that has all the power and signal names and pins, and I use that connector symbol in all other projects. Itâs an easy way to prevent making connection mistakes such as your reversed LED to such a connector. So in your case, you can create (modify) a connector symbol, and name the pins of the connector âGNDâ and â3Vâ. Note these are not wire labels, just pin names.
Thank you @3Dogs and @paulvdh for your answers. If i âget rid of the power/groundâ symbols i must use local labels which was in principle my second option, for visually wiring all these together is certainly not an option. But i think âthe conclusion that it is not supportedâ seems the correct one. Too bad, i really hoped i had overlooked something.
Anyway, i think the option to connect two pads (placed manually or as part of an existing footprint) by a virtual wire on the PCB would be a great addition (maybe in the form of an user-signal layer). It helps in my use case, but also in the case where it turns out the routing becomes impossible, and you decide and external wire will be added later to the PCB to bridge that last path you could not cross.
I support the addition of a âvirtual wire layerâ as I too have had situations where adding a link wire to a design removed the need for an entire layer.
Admittedly this was in the days when PCBs were expensive, and my design was single layer. Quantity was low. Components were all through-hole. Manual assembly. A link wire saved the day.
It is less of an issue today when multi-layer PCBs can be had for a few dollars from China (I think the price of single-layer boards might even be higher at some places?).
But KiCAD is used by hobbyists as well as professionals, and making a one-off with a few link wires is no issue for a hobbyist!
PS: Adding a specific layer for this purpose may be mute, as an âextraâ layer pair can just be added to the design but left out of the gerber pack (it does make creation of a âgerber packâ a lot more difficult and prone to error though).
However, if weâre talking gerbers and manufacturers we are starting to creep out of the âhobbyistâ realm.
I was thinking 10 minutes and I canât get what âdifficultiesâ in creating gerbers you have in mind. When 15 years ago I had to add at 2 layer PCB 3 wire connections I just changed design into 4 layers and draw 3 tracks at one of extra layers.
Then when generating gerbers I just didnât checked internal layers to be generated. Done.
But not checking 2 layers canât be said to âmake creation of a âgerber packâ a lot more difficult and prone to errorâ so I wonder what you can have in mind.
You overlooked that you can add extra layers and make there connections just to silence DRC.
Typically there are no imposed by the manufacturer rule that your PCB have to be rectangle. You can have any PCB shape. To make separation easier modify Edge.Cuts to have most of work be done by PCB manufacturer.
Here I showed the example of KiCad 5 made PCB I ordered 4 years ago:
Hmm, I guess there is a hack to solve any problem, but adding layers to make a connection that is later to be done by a physical wire or connector is just not the âroyal wayâ. An other problem with this approach is that my PCB manufacturer accepts native KiCad files as production input. The last thing I want is confusion about the number of copper layers that must actually be produced.
True, and thanks for the tip. Separation is not a problem for me. The PCB i showed was just quickly made to show an example. My actual use case is much more complex, and has all the cuts and mouse bites required.
I didnât had to design footprint being these wires taking into account the length of each connection,
I could draw wires as I do with standard tracks,
I used that layer to make separate documentation of connections that had to be made by wires.
Around 1990 when our devices (GAL & Serial EEPROM programmer) were sold in electronics stores we had feedback from one store that a customer was saying that shortly he will do the copy of our product. Later it happened that other customer persuaded the seller to lend him the programmer to check. He returned it, but when the next customer bought it it turned out that it didnât work. After opening the device the seller stated that the entire interior had been stolen. Only the zif socket and the LEDs were left.
We then decided that no one should know about our devices nothing more than he only needs. For example to PCB manufacturer we send only gerbers, and contract manufacturer donât get our products schematics.
Because of this I didnât even thought that someone can send them the whole design.
There were interest in copying this programmer because all new versions of PC software controlling it we provided for free. And device someone bought in 1990 could work with software I provided 20 years later supporting many more elements than initially. In the times when there were no flash and upgrades we did it using 8051 internal 128 bytes RAM to store each device programming program (send each time from PC), data to be programmed, program variables and microcontroller stack. Yes 128 bytes (not kilobytes).
@Piotr
You are exactly right - you can in fact turn individual layers on/off for export to gerber. My bad - turn that into a downvote, KiCAD can already do it.
And in relation to persons stealing the GALs etc, and them returning it - that is really low. One would think theyâd buy it and keep it⌠then no-one would ever know they stripped it down. But the way they did it! Stupid in my opinion. Now it is known what they did (even if bought with âcashâ and they were untraceable). Now you take precautions.
I donât send my PCB file to anyone. On occasion I deliberately get the PCB made without reference designators: are those pads for an R, or a C, L, diode⌠To make reversing even more difficult, add some extra layers and put all the traces on the inside, with some ground layers to prevent light from revealing where those buried tracks go⌠is making someones life difficult worth the cost difference between 4 and 6 layers? A good many PCB fabs do via-in-pad now too. A pad with no tracks??? WTF???
Wonât stop someone determined, but will make it a lot harder (and hopefully un-economic).
Actually that last comment of mine âA pad with no tracksâ is how a person (admittedly, one with minimal experience) would view a circuit board that used via-in-pad (VIPPO) technology⌠how can a component work with nothing connected to it (excluding antennas of course )
Sorry for the confusion!
I know Iâm going out of KiCad subject. Trying to be as concise as possible. Sorry.
He found he is not able to copy it so decided to stole. Before you judge his decision as stupid you have to consider the abnormal economic situation here those time. Working as academic teacher I earned $13 per month (not a mistake), and 8751 alone (with EPROM integrated) costed probably around $5 so all BOM may be $10. Adding PCB, assembling, programming, metal case (hand made individually for us by other manufacturer) and some for development costs the end price could be about $40. It could be his 4 month income so after stopping eating for 4 months âŚ
Til 2017 our PCBs had no silk at all (in Protel we used silk layer for our documentation needs). Assembling machine need not it.
Since I moved to KiCad I use silk but having only PCB name and footprint rectangles.
I have read that getting out the flash contents (by grinding) is getting cheaper and cheaper.
Doing some smart things in design (no silkscreen, buried tracks, making sure âreadoutâ is disabled for FPGA/microcontroller) costs little to nothing. Others cost a little (grinding off part numbers, opting for buried vias). Some a little more (potting in hard black goop). But nothing will stop someone with a big enough budget - and it may be cheaper for an adversary to perform a little industrial espionage rather than go the hard wayâŚ
But that is all off topic.
@joojala What do yo mean âYou should do a feature request of thisâ ?
Edit: Sorry, just realised it was in response to my âsupport the additionâ, but I believe KiCAD already has the ability to âhackâ a solution by adding layers that never get manufactured.
Well there is already a DNP property on parts so itâs not too outrageous to suggest a Do Not Manufacture property on layers. Of course this also increases the chances of inadvertently switching it off, but people do forget to plot some Gerber layers too.
). But we see that two âwiresâ are failing. This is because we make use of the power symbols 
Separation is not a problem for me. The PCB i showed was just quickly made to show an example. My actual use case is much more complex, and has all the cuts and mouse bites required.
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