There are many ways how to achieve similar things in KiCad.
In eeschema you can either:
put the section that you wish to copy in its own sheet, and have multiple references to this sheet
select the ciruitry you wish to duplicate, right click and choose duplicate block
in pcbnew you can:
select part of the circuitry you wish to duplicate, right click and choose duplicate block. Keep in mind that these changes will not be back-annotated to schematics
use the Replicate layout plugin. In order to do so, the schematics has to be prepared accordingly (multiple references to the same sheet). Only this pard is not possible without a plugin.
As for the plugin you should:
check if you have KICAD_SCRIPTING_WXPYTHON enabled. If you don’t have and you are on windows, reinstall Kicad using this installer (it is the same as official V5.0 only with WXPYTHON enabled)
download the .zip containing all my plugins from github (big green button)
extract the replicate_layout folder from the zip and put it in:
%APPDATA%\kicad\scripting\plugins
And finally the forum is here exactly for this purpose. Asking questions. So I don’t mind. You do have to keep in mind that person on the other side can have totally different background (language, culture) and some misunderstandings are to be expected.
Thanks again for your feedback! … I’ve looked into your suggestions today and it seems to me that this may be the most feasible solution as I would like the schematic to be a representation of what the components, traces, etc. actually look like on the PCB:
However, I have searched for the meaning of “multiple references” in the eeschema and I can’t find this described in the manual or elsewhere … I likely have missed it but can you briefly say what it means and how it is done in practice? Here I would have liked to upload a small example schematic but being a new member on this forum I cannot do so …
About the folder in which to install the plugin I have searched my computer for it but I can’t find it … (?) Again I would have liked to upload a screen dump of what the file structure looks like - the folder “programs” on C:\ (not “programs x486” but KiCad is not here) is locked and I cannot unlock it even if I try the hints I have found searching the internet incl. additional administrator rights via the command prompt - so I don’t know if %Appdata% is found there …
In C:\users"my name"\ … there is a hidden file called “application data” but I can’t get access to this file either …
So I am a bit stuck here … Might you have a suggestion?
And they - just FYI - I will not be back to the forum for the next three days - i.e. not until Tuesday morning. Have a good weekend when to get to this point …
He is referring to hierarchical schematics. There is a section in the manual for hierarchical schematics. Also, there is another recent thread where I encouraged the OP to convert his schematic with 4 repeated sub circuits to a hierarchical schematic. See the second half of this post for my result (pdf only) and some notes I wrote about hierarchical schematics: (One of these days, I’ll actually spell “hierarchical” correctly an not rely on spell check to correct me. Apparently not even in this parenthetical…)
It also might be instructive to read over the full thread to see someone else’s design options and decisions (and I think he might have attached his project to the thread after he converted to hierarchical schematic to give you something to play with).
You sure it is a file? It should be a folder, and named (in US-english localizations) “AppData”. The environmental variable %APPDATA% actually fully resolves to “C:\Users<user name>\AppData\Roaming”, but Microsoft doesn’t want normal people to access that file so it is hidden.
You would need to enable it in Windows using the “File Explorer Options”. Set the setting that I have my mouse pointer on in this screenshot:
I hope your absence is for good things. In that spirit, I wish you an enjoyable weekend.
Hi SembazuruCDE … just a brief remark to say that I have seen your post and it already helped me find the appdata folder - as it correctly is - thanks.
It is for the good in many ways, thanks - best wishes for your weekend as well
Yeah, I can imagine that my instructions were terse and I probably did not use the same terms that are used in KiCad documentation. Anyhow, when you create hierarchal sheet you give it a sheet name and you also give it a schematic file name. You can then create another hierarchal sheet, with different sheet name, but the same file name
So I am back after having had to divert my attention mainly to getting a CNC router I bought work as intended. Unfortunately this is not yet the case but while building a new CNC mill “in the background” I would now like to return my attention to learning KiCAD …
Since our previous posts I have been reading up on hierarchical (@SembazuruCDE: I remember how to spell “hierarchical” by memorizing that it needs two "r"s - seems to work ;-)) schematics and the options here. And I would now have liked to download the WXPYTHON enabled version that MitjaN linked to so that I could practice these duplicate hierarchical schematics with PCBNew.
However, in the meantime there’s a new version of KiCAD - 5.01 - and your link (MitjaN) from Oct. 5th no longer works. Thus, any chance I can ask you to link to the right file again? Or tell me what to look for in the KiCAD installation versions here:
Just wanted to say - in case somebody else reads this thread - that the plugin folder where the replicate_layout folder is to be placed can be found here:
C:\Users<user name>\AppData\Roaming … I thought I had found it here earlier but there is no replicate_layout folder here (but thanks to SembazuruCDE for suggesting ;-))
As explained above, exactly this flow is not supported, and it would be quite hard to do.
It might be easy to say, but the “AND update the eeschema schematic to reflect this copy in PCBnew (subsequently with the correct global connection labels).” would require some level of clairvoyance.
Where would eeschema place those parts added by copy in PCB ?
What if you add or delete one more part ?
You must manually re-annotate the refdes in PCB, how does eeschema know what rules you used ?
Presently, block duplicate in PCB, also duplicates exactly the net names, which is not what you want
Hence the more conventional flow is to duplicate first in eeschema, using the one hierarchical page mentioned above, and now eeschema manages the 12 copies and the refdes re-labeling rules and the trace net-name re-labeling rules.
That just leaves clone by script in PCB, and the 12x parts and nets are already imported, just in a big pile !
Thus that script mentioned, is used to be given a starting routed example, and then it picks from the pile, the 11 copies and moves parts/clones traces.
This is all much simpler, as the script is doing nothing more than move and copy, it does not relabel anything.
Hi … to the best of my very limited programming knowledge I haven’t put any “user files” here. Only the replicate_layout file suggested by MitjaN above.
And the replicate layout plugin now shows up in PCBNew when I go into “tools ->external plugins”.
However, I apparently am missing something related to how to use this plugin … I have set up a very simple schematic only consisting of a few components on two hierarchical subsheets - yet no matter what I do I get the same message saying "more or less than 1 module selected … " . I have attached a screendump showing what happens …
Looking at MitjaN’s images and the gif on the github download pages I don’t exactly know what could be amiss here … But I reckon that it may have something to do with selecting the layout to be replicated in the right way.
Any ideas would be appreciated …
Cheers,
Jesper
P.S.: FYI I have also uploaded what I guess may be the schematic files - hope they can be opened on their own…
You have to select one and only one of the modules (footprints) which are to be replicated.
It might be a bit strange at first but if you have a dense design it might be hard to select all the modules, so I’ve implemented it this way. Also the modules might be on different hierarchical levels, and it is easier to control which level to replicate when you select only one module
thanks again for following up on this … I would say that I am doing what I should be doing (always saying this with appropriate humbleness ) but I think there is either something in the setup that doesn’t “work” or … something else … The schematic is extremely simple (3 components on each subsheet) but I still get the message I mentioned in my post …
One thing I notice is that in your gif on github you seem to select the subsheet in the “hierarchical tree” drop-down box. Even if I do this it has no effect in PCBNew.
FYI I have attached pdf showing what the root sheet, two subsheets and PCBNew looks like.
What I do is that when inside PCBNew I select e.g. the right subsheet circuit with the mouse - then I go into options -> external plugins -> Replicate layout … And here it is that I get the error message.
It is good engineering practice to always put a 0 (zero) in front of the decimal marker for numbers less than 1 (one). This is so that on a medicine bottle if the decimal marker gets obliterated you don’t want to be giving a baby ten times the dosage prescribed. For a .1 µF capacitor this would be 0.1 µF but it would be better to state it as 100 nF. This way you don’t have to figure out how to get the Greek letter lower case Mu.
I have not used hierarchical schematics and would suggest using the non-class letter N in a ref des prefix, as described in ANSI/ASME Y14.44, for your 12 power supplies circuitry. You said all 12 are similar but not the same, so this would allow you to segregate the 12 power supplies with differences. You would have N1 through N12 as ref des prefixes and thus N1R1 would not have to be the same value as N12R1 and N1VR1 would not have to be the same as N2VR1, etc.
Unfortunately, in the context of KiCad I don’t know how to do this with hierarchical sheets. That two part numbering sequence for the reference designators can’t automatically be done by KiCad. If it does work (I haven’t tried, so it very well might work) would have to be completely hand annotated.
But, even worse, the only thing that can be entered differently on different instances of hierarchical sheets that use the same schematic file are the reference designators. All the values will be the same. If you set N1R1 to 50Ω on page 2 (assuming page 1 is the top-level hierarchical sheet), then as soon as you open page 3 to change N2R2 to 100Ω, N1R1 will also be changed to 100Ω (as will all the other N#R1 values).
I don’t think MitajN’s script will work for hierarchical sheets that use separate schematic files. How is the script supposed to realize that the schematics of different files are, actually, the same schematic just with different component values?
There is no schematic capture program, including KiCad, that understands the mechanical-boundary line convention of ASME Y14.44, Figure 3 Reference Designation in a Typical Schematic Diagram. I was suggesting an alternative method that can be used and doesn’t use the hierarchical method. The use of the (non-)class letter N, which is listed in IEEE 315, Clause 22.4 Class Designation Letters: Alphabetical List, is covered by ASME Y14.44, Clause 3 LOCATION NUMBERING METHOD (see ASME Y14.44, Figure 15 Location Numbering Applied at Several Subdivision Levels that is an extension of the Unit Numbering Method covered by ASME Y14.44, Clause 2 UNIT NUMBERING METHOD. Yes, you would have to “manually” put the proper N# ref des prefix ahead of the basic ref des for each “sub circuit”.
I just did a top level schematic diagram that had a Front Panel, Rear Panel, and a printed circuit board assembly (PBA). For the Front Panel parts I used ref des prefix A1, for the Rear Panel parts I used ref des prefix A2, and for the PBA (PCB) I used ref des prefix A3. I then copied this schematic, deleted all parts with A1 and A2 ref des prefixes, leaving me with the parts that make up the PBA (PCB). Now I am in a quandary. How do I separate the PCB from the PBA? How would you provision the use of a PCB to be used in two or more different assemblies?
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