Looks good. Just some points:
- In your table for segment A you incorrectly call out Drain0, should be Drain1 (RJ45 pin 8)
- Your bypass caps you have a value of “.1 uF”. I’ve found that if you don’t include the leading one’s place zero the decimal point can go unnoticed. Try instead to use “0.1 uF” to make it obvious that you mean a tenth of a microfarad, not one microfarad.
- For documentation purposes, and to make it easier to find the LED power net to assign it wider traces if you want, you may want to give that line a label. One idea might be “VPWR” on the idea of GND is to VCC as GNDPWR is to VPWR. (Sorry if that is an SAT trigger.)
- Your J0 is documentation on the schematic only so you should put a hash mark in front of it. i.e. change the ref’d to “#J0”. This is a trick to keep that component from being put into your netlist and thus showing on the PCB. (Edit any of the power symbols or the power flags and you will see that each has their own unique reference designator, proceeded by a hash mark.)
- You label the screw terminal as 14.8V, but your note next to the screw terminal states 14.7V. (This may have been on the first page and no one noticed until now…)
- An option for getting more room between your output stages for the labels is to increase your page size (like up to A3). Granted, that does mean that if you print it out on A4 paper, everything will be small.
- I like the graphic you grabbed for documenting your segments. Looks good.
I did go ahead and convert your schematic to hierarchical. Remember, I’m not just going to give it to you, but I will show you what it can look like. Here is a 5-page PDF (first page is A4, the rest are A5).:
ScoreboardCircuits.pdf (148.3 KB)
Now that I’ve done this, the method is fresh in my mind. I should be able to help if you get stuck anywhere if you choose to do this. (If you don’t want to, please don’t feel pressured to do so. I really just wanted an excuse for some practice and took your project as an easy opportunity for me.)
Some points about the hierarchical schematic:
- Note how even though the 4 sheets (pages 2-5) all point to the same file (“Digits.sch”), each page has different reference designators and a different page title. The page title is both on the sheet object, and in the title block of each sheet.
- Because the named nets on the digit pages are local nets, the page name proceeds the net name in the netlist. So on the Digit0 page, the SEG_A net is called “/Digit0/SEG_A”. The same net on the Digit1 page is called “/Digit1/SEG_A”. And so on for the other nets. This keeps them from connecting on the PCB.
- When you get around to assigning footprints, you only need to edit the components on one of the sheets to add the footprints, and the other sheets will follow suit. Same thing if you decide you need to change a footprint on all of them. Make one change and the other 3 corresponding parts “magically” all change. (Sheets in hierarchical schematics can be thought of analogous to objects or functions in programming.)
- Unfortunately (and this might be a prime reason not to use hierarchical sheets in this case), except for the reference designators and the sheet name, all the sheets using the same schematic file need to be identical. You can’t have a note on one saying “this goes to digit 0” and the same note on another page saying “this goes to digit 1”. That’s why I put that part of the documentation on the top page as a note on top of the sheet objects. This might be unacceptable for how you want to document your project.
Keep up the good work.