Your symptoms still sound like a conflict over required clearances, minimum trace widths, etc, between the fill zone and the pads on the ATMega part. As you say, the routing is now complete and very acceptable so there is no reason (other than your personal understanding of KiCAD’s behavior) to put more effort into solving the problem.
I always place traces - usually very thin traces - that connect all pads to their nets, even if the pads are inside a fill zone. This gives me confidence that the fill zone can actually make the connections to the pads. The fill zone should overlay the traces and nobody will ever know they are there.
A few things to improve.
Drag C1 down a little to reduce the 5V track length.
Add a 2nd decoupler near the “6” of 16MHz.
Try to put the crystal and it’s capacitors closer to the cpu
These will make your board quieter
The line (ratsnest) between the two pads 3 and 5 in your first post leads me to believe that they are not actually connected properly so the drc will see them as part of the ground net.
Are any of the GND pins or pads on the board being connected by the ground fill? If not then check your schematic drawing and insure that you have placed a PWR flag and connected it to the ground net. If you forgot to do that then you will need to export the netlist and re-import it to the pcb. PAY ATTENTION TO THE NETLIST IMPORT DIALOG IN CVPCB SO YOU DON’T HAVE UNEXPECTED RESULTS. ALSO IT WOULD BE A GOOD IDEA TO SAVE A COPY OF YOUR PROJECT BEFORE YOU GO ANY FURTHER SO YOU CAN ALWAYS REVERT BACK.
Did you do a DRC (bug icon) check in the schematic?? Were there any errors or alerts??
Also in your later screenshots I see a ratsnest throughout all your ground pins… did you insure that you used the same GND net for each of those pins?
I don’t think it’s a clearance issue… I believe Kicad does not think these un-connected ground pins are part of your GND fill.
Just a couple of thoughts and I may(likely) be way off base.
dwight
Hello, sorry for not answering, as a new member I was not allowed to leave so much comments in one day Thanks for your replies and suggestions.
@Joan_Sparky clearance is 0,2mm, that should not be the issue.
I finished my board, I have one more concern before sending gerber/drill files to the manufacturer… As far as I know the soldermask should be between the pads to prevent shorting the pins through solder bridges… I think that in my case the main chip ATMEGA328 should have soldermask between the pads but I think it has not. I am attaching two photos. Please suggest or comment if it is ok anyway. The footprint is not my own, but from one of the libraries.
Look at your manufacturers capabilities.
Set the mask minimum width and mask clearance accordingly. (These might also depend on how thick your copper layer is.)
If the settings dictated by your manufacturer do not suffice to get mask between the pins either switch manufacturer or live with it. (If you are hand-soldering your pcb it should be ok without solder mask in between. But you might need a lot of patience and flux to get it soldered.)
Most of your tracks are 0.2mm (10mil) which isn’t too bad, depending on where you get this made. 0.3 mm would be safer.
May I ask why you mix 0805 with 0603 packages and then use footprints for reflow here and hand soldering/wave soldering there?
Also, there are SMD crystals available which are much smaller what you got there (shorter tracks, better clock).
The 9V source should go in close to where it’s power is needed most - at that big TO220 package for the IR leds, and you can definitely pick up the 9V for the TO220 up there at U2, don’t need to cross the whole left board for it.
Same goes for SS signal. Just grab it at the MCU and go on the back to that TO220 pin.
You need to use more vias.
Also, if this is going to be hand soldered, think about putting the SMD components into a row (where possible without undermining the electrical properties), that you can get easily to them with a soldering iron tip - even for reflow, the whole thing becomes easier and better to route and looks less like a dogs breakfast .
Thank you for the reply and all the tips! Some more questions:
1.) Can I always use settings that you recommended (zone properties, pads mask clearance)? Does this depend on the manufacturer or what is the limit? Or you just simply play around until it works? With your settings, the fill works now. And also the soldermask is between the pads of ATMEGA328. Thanks!
2.) Can I use vias under chip? The SS line to the mosfet is much shorter this way (see photo).
And I also moved the 9V source closer. Is that way ok?
3.) Where did I use the reflow footprints? How can I figure out this? This is important, I can only hand solder it!
Yes, I agree, it will take some time to master it, I just started KiCad at saturday, I have learned electronics all on my own, but never done pcb before.
depends on the manufacturer
Officially my manufacturer of choice supports min soldermask width 0.2mm and a soldermask clearance of 0.2mm, but from past experience I can set it to 0.1 and 0.05 respectively.
Yes, why not?
It always depends on the device though, for example SD card slots have areas where you shouldn’t have any tracks, due to mechanical things happening there and the possibility of creating shorts. Or some other chips (power) would want some heat sinking underneath them. Check the datasheets is the best advise in this case.
PS: if you intend to use the ADC of the AVR, check out the ADC layout section in it’s datasheet, all detailed in there what you have to do.
D1,D2 look like reflow for 0603 package, which is pretty small (=need fine tip solder iron, magn glasses, steady hand)
C1,C2,C4,C5 also look like 0603, but on hand soldering pads
C3,R2,R3 look like 0805 on hand soldering pads
R1 looks like 0603 again
R7 is bigger might be 1206
Also if you’re hand soldering you can move some stuff on the back, to get shorter tracks - I’m looking at C4&C5 there.
Same for C1, could sit right at the back of that AVR.
And possibly C2,C3 for U2.
You might want to check the orientation of your LEDs D1, D2. The Crystal load capacitors C4,C5 should be as close as possible to the pins of the IC and keep the oscillator tracks as separate as possible. You might also want to add some text to the silkscreen to identify pin 1 of J2.
Also you can turn off rendering of values in the “Render” tab in the right hand window pane.
Thank you again for the help. In the last days I have read posts about correct grounding and bypassing. Read many things, but these 3 seem good to me so I kept them in mind:
In addition I modified my pcb layout according to these posts. Now I only have one ground plane and that is the bottom one. I wanted to keep that plane as empty as possible (before it was not, it was covered with lots of long traces). The upper layer is now not filled (before it was Vcc). I connected all the U2 GND pins together, connected them to bypass capacitor and the “crystal circuit” and then connected to the main bottom ground plane at only one point through one via (that point is below the U2 chip). These prevents high frequency currents from running down the main ground plain. It keeps the gnd plane clean. Other parts are all connected through several vias directly to main ground plane. (LEDs, voltage regulator, switch, ISP connector,…). I am writing this from what I have read and (somehow) understood; I am definitely not sure about my layout and have no experience with pcb. I would be thankful if you guys take a look at my layout one more time and comment it.
I am kind of confused now since many of you helped me and stated that I should put many components on the back side to make all the traces as short as possible. Some sources say that the GND plane should be as empty as possible and uniform (only covered with short traces if necessary). An example is the eevblog video. That means that the traces on upper layer are not short. Help solve the confusion
Unfortunately there are still several things wrong, or could be improved, with your board.
There are no silkscreen markings for your SMT LEDs (D1, D2) but standard orientation for SMT components defines pin 1 as the positive pin or in case of diodes it is the cathode. I don’t think that is what you want here, you’ll need to correct that on your schematic. Your THT LEDs are correct.
The link you posted above for the crystal layout is one of many examples of misleading information that can be found on the Internet. Unfortunately the correct answer on that page only got one vote. When in doubt consult the manufacturer.
You also need to identify the pins of your 6 pin connector. Once the connector is installed there will be nothing to indicate which pin is pin 1. I would add text to the silkscreen to identify the function of all the pins. It also appears that some of the components have the silkscreen reference id under the component so it will be hidden once the component is installed.
You always want to keep tracks as short as possible but not at the expense of violating other rules. While it might not be an issue for your board, the ground plane should always be as solid as possible. If you do route tracks through the ground plane you need to be careful not to route any high speed signals on other layers across the voids created in the ground plane.
Why do you think that D1 and D2 are incorrect? I checked, they are fine in the schematics. Yes some of the text was hidden because I rearranged some components and before it was complete I wasn’t sure about issues mentioned above.
I read the pdf link you posted, thanks. But it still mentions to stay away from return currents of pwm, power lines, etc. It also mentions to put a local gnd plane which connects to the main gnd plane. I know that there should also be bypass capacitors which connect the main ground plane through one point only (correct me if I am wrong). I did it this way (look the photo below) but still don’t know for sure. Two bypass capacitors, one on which side and the crystal circuit. All are connected to the main ground plane through only one point.
Thanks for your replies and suggestions.
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With your settings, the fill works now. And also the soldermask is between the pads of ATMEGA328. Thanks!
