I’m having an odd problem with my fills. I’m new to KiCAD, and I’ve figured out most of my issues, but this one is stumping me. I’m using v6.0.9-0
I have a four layer board, and the two internal layers are a ground and Vcc plane. All settings for both the planes are identical as are the pad definitions for the (custom) footprint that I created. I have a TE connectivity connector with 2.54mm spacing, and the ground plane properly creates thermal reliefs for the pins that are tied to GND. However, on the Vcc plane, the pins remain unconnected (but other components on the board do have thermal relief connections for Vcc holes).
In an experiment, I swapped the net assignments for the two layers and suddenly the VCC layer started having the pads connected and the GND did not. The conclusion is that the issue must be with the layer, but I see no differences. I’ve blown away both layers and I still have the same problem after recreating them.
One additional interesting phenomena exists. If you look at the picture below, the brown plane is the VCC and the GND is green. I don’t understand why the VCC layer goes around each pad while the GND layer seems to “stay out” of the area on inside the TE connector footprint.
[I’ll try to add the picture to the thread… apparently I am limited to one picture per post as a new user, although to accurately show the problem I need about 5 shots…]
VCC plane (note the complete fill around all pads, but NO connections for VCC, which remain un-routed)
(NOTE: the GND pins show as unrouted because this screenshot was taken before I did that… Please ignore the GND traces here!)
And, finally, the GND layer. This connected GND pins via thermal reliefs but I had to manually add traces to internal GND pins because the flow did not go into the inter pin area even though the settings are the same:
This is an example of where I’ve temporarily swapped layers. The layer I was using for GND is now VCC and vice versa. As mentioned, now the VCC pins have thermal connections and the GND do not. The best I can make of this scenario is that the issue somehow relates to the layer settings, but I don’t see any difference:
Thanks for the suggestion… When I was fighting with this last night, I tried messing around with the relief gap and spoke width, but I didn’t have much luck there. I was able to get it to work if I used “pad connections” instead of thermal relief, and that is my backup plan if I can’t get the relief to work. Thank you for reminding me of this! I forgot to post that tidbit of information.
I did the experimenting last night somewhat “blindly” and without a process, I have to admit…
I will try to experiment with the zone priorities, but if these are on different layers, will priority even play a role? There shouldn’t be any conflicts there, I would think.
As for the used footprint. Again, thanks for the question. I did find a post here on the forum that suggested ‘connect all copper layers’ and confirmed that this is the way my setting have been set. I just forgot to put that in the initial posting.
There does indeed seem to be no room for thermal reliefs.
Note that pad A49 in the first screenshot is also not connected to the GND plane.
Connecting pads with manual laid down tracks is quite common when the thermal via’s don’t work.
I’m not sure about your 3rd post (2nd screenshot) with the brown layer. Are you sure it’s set to the correct net?
Sometimes it helps to rotate the pad 45 degrees in the footprint editor. Or, the pads in your connector footprint are probably already roated to get the spokes to connect diagonally instead of horizontally and vertically.
I’m willing to have a look at your project. Can you post a simplified version here, with just the connector, some other parts to connect to so the nets are preserved and a (rectangular) PCB outline.
When I place fill area I always change its Clearance to 0.25, Minimu width to 0.2, Thermal relief gap to 0.25 and Thermal spoke width to 0.25.
I suppose GND fill with such settings (or even smaller) will have a chance to reach B40 pin.
I will try to experiment with the zone priorities, but if these are on different layers, will priority even play a role? There shouldn’t be any conflicts there, I would think.
That was only a general remark, independent from the shown project/problem. Assigning unique priorities will prevent conficting zones (sooner or later).
I second pauls question about the project - only with an example project it’s useful to investigate further (complete project archive, not only board-file. Use the archive-command from the main kicad manager).
Thank you for the suggestions on the plane settings. Honestly, I wasn’t really sure what I should do there so I left it at the defaults. I’ve changed it and the copper now flows into the internal area on the ground plane. So that problem is resolve. Unfortunately, the VCC issue still remains. I’ve attached a screenshot of just VCC (GND is hidden) showing progression closer to the VCC pans, but they are still not connected.
I’ll try to build up a sample project that demonstrates the issue and send that along. It might take me a bit, however, as this isn’t a day job project.
I did decide to try the “solid” pad connection option, and I confirmed my memory from last night. As shown below, the VCC pads are now connected. Interestingly, however, the un-routed lines are still shown, however, so it seems like parts of the system are still confused.
Paul,
I’m sorry… I neglected to address some of your observations… A49 became connected, along with many of the internal pads, once I changed the relief data per the suggestions. At this point, the GND layer seems to be correct.
As for the third post. Yes, that is definitely the Vcc layer, and the crux of the problem. Even after fine tuning some of the configurations, the VCC layer still fails to address the unrouted pins (shown on the screen) even though they are the same net as the brown plane.
I’ve actually gotten the unrouted lines to go away if I manually route bridges between the pads and the plane (effectively performing a manual thermal relief). However, this still results in entries for those connections within the “Unconnected Items” tab of the ERC. maybe that isn’t important?
Cool… I was able to create a small sample project that has the TE connector and two diodes. The diodes are just there to show that the thermal relief and connections work on them completely (both ground and VCC), but the same behavior is not seen on the connector.
Now the problem… As a new user, I cannot upload attachments. . Is there a different KiCAD forum where I can elicit help without the restrictions? I get why they exist…I wish they did on phones! (I’ve had 3 spam phone calls today already…), but it is tough when you are both fighting KiCAD and spambots at the same time. sigh.
Here is a simple project file that demonstrates the behavior I’m seeing. testroute.zip (123.3 KB)
One thing of interest while looking at this… If you tinker with the ‘solid’ option (versus thermal relief), it seems like KiCAD isn’t really abiding by the clearances. In fact, it almost seems as though the fill goes all the way to the hole, which would effectively short all the pads out. That would certainly not be good… Mind you, I might be misinterpreting the image coloring.
. Is there a different KiCAD forum where I can elicit help without the restrictions? I get why they exist…I wish they did on phones! (I’ve had 3 spam phone calls today already…), but it is tough when you are both fighting KiCAD and spambots at the same time. sigh.