Hi, I am looking for a way to design a footprint with some pads on F layer and other on an internal layer (i.e. IN1).
I am working on the layout of a ceramic PCB in thick film technology, which can create layers in a “staggered” form, exposing the internal copper traces.
I need to place some ASICs with a very small pads pitch, so I would like to have a row of the ASIC pads (actually, the pads for the bonding) on the internal layer IN1, so I do not use vias to go from F to IN1.
The image below shows a section (not to scale) of the solution I am thinking, but is it possible?
Thanks
Temistocle
To my knowledge it’s not feasible.
May be you can try to edit with a text editor the pad, to put them on the In1 layer.
In the past that was a trick to a edge cut in a footprint, eventough at the time the footprint editor would not allow it.
In your case, could you not put on row followed by a via, and the a second row behind it.
If you can do blind via, that should not take any extra pace or really limit the routing.
There’s no standard way to represent the “staggered form” in KiCad, probably not in any EDA, and for example Gerber format would know nothing about this. You have to ask your manufacturer, they will tell if this is possible and how they want the representation of the design. Basically it would just be layers, and some technical layer giving information about the recess.
The only thing specific to KiCad would be pads on inner layers. KiCad doesn’t support this in the GUI. However, it understands pads in inner layers. You just would have to change the layer of the pads manually in the files. Create a simple SMD footprint and peek into the text file (.kicad_mod). You see the pad layer information there. Change it to an inner layer, and KiCad should be happy with that footprint.
v.7.0.11
I created a Footprint with Four different PAD’s (the item in lower right of image called innerPADs)
Set them to Connected Layers.
Placed the Footprint on a PCB and connected Tracks to them. I did Not edit any files.
(I may not understand what you want…)
Bertrand, eelik, thank you very much!
I tried and it worked! And it is very simple to implement!
As an example for other people interested in ths solution, the screenshot below shows a raw routing of my ASIC with the nearest pad row on layer IN1 (green). The DRC did not find any error.
Thank you again
Temistocle
Thank you BlackCoffe, this could be another solution.
Since I started form an old footprint (with SMD pads already in the right X-Y position on F.Cu), it is easier to edit the file to change their Z position.
T.
How will you make the bonding? I don’t see the copper exposed pads in the image you’ve shared. You also say that you don’t use F to IN1 vias but I see one.
I may not understand what you want either…
Hi gschelotto, I will make the bonding on the double row pads in the last figure I posted. Below you can see the footprint with the small pads on the ASIC (white squares on the edge of the chip) and the doble row of pads on the PCB (green for the IN1 layer, red for the F layer). In a “normal” PCB all the pads should be in the F.Cu layer.
I will use vias in my design, but I wanted to reduce their number starting directly from IN1 for the inner row.
I’ve seen boards built this way before so you’re not the only one to try to do this.
The trick is to specify three outline edge layers.
Outline 1: cutout of F layer/substrate
Outline 2: cutout of in1 layer/substrate
Outline 3: outline of the PCB itself
Essentially the manufacturer will cut out pockets prior to lamination. You will not be able to get silkscreen or soldermask down in the pocket, so add a clearance around the pocket for those layers.
Recently, there was another thread about LTCC (Low Temperature Co-fired Ceramics)
It seems to be a quite specialized technology for a niche market, and I’m not sure whether KiCad is interested in developing full support for this.
@Milamia Maybe it is an option to team up with a few KiCad users interested in LTCC to discuss whether sponsoring custom development is an option for you. Do you have contacts with other companies interested in this? But any custom development has to fit within KiCad’s long term goals. If you want to examine this possibility, then start with contacting https://www.kipro-pcb.com/ They do commercial support for KiCad, and also can do priority / custom feature implementations.