First PCB: will it work as intended? (SST39SF 32TSOP to 32DIP adapter)

[fukusan]

Hi all,

New to Kicad and CAD for PCB design in general, I just spent some time on a simple PCB to adapt 32TSOP packages (12,5 to 18,5mm length) to 32DIP.

I used two footprints available (one slightly modified) in kicad, and added tracks between the relevant pins.

It looks ok in the 3D viewer, but it gets errors in the DRC, mainly

Front solder mask aperture bridges items with different nets

but I think it’s because of the two footprints overlapping, and the message can be ignored.

I can’t upload files as a new user, but the project is available here :

EDIT: I now can upload files, and here is the latest version of the PCB project if someone needs it :

tsop_dip_third-2024-05-31_192842.zip (26.0 KB)

Would someone confirm it’s okay ? Also, I’ll gladly read advices if some modifications are needed.

Thanks for your time,
F.

[paulvdh]

You created this without a schematic, and the netlist that is generated by the schematic. As a result, KiCad does not know how how to make connections, and between which items to calculate clearances. KiCad is completely build around starting with a schematic, or more accurately, the netlist.

You can probably ignore this warning:

@fukusan

Front solder mask aperture bridges items with different nets

but the absence of a schematic (+netlist) creates other problems that you can not ignore. For example, pin 17 of the 32TSOP package is nearly shorted to the track from pin 18. (And the same near pin 32). KiCad does not know about this, because of the lack of schematic.

I guess you had some troubles with drawing the tracks. It looks like you created a block and then copied and mirrored it a few times. This is not a good way to use KiCad.

[paulvdh]

This is how I would do it.

17:36 I start with creating a schematic. On it I put two connectors, each with 32 pins.
17:39 Mirroring one of the connectors, putting its pins on the other, and then pulling it apart, already draws most of the tracks:

17:41 Draw a single wire, hold down [Ins] key to make some more copies (better to have too many, then too little:

17:43, Press l (lower case L) to place a label, I will call it DIP25 for it’s pin number, and place it on the wire:

17:45 Press the [Ins] key for a while untill you have enough labels:

17:46 Delete all the excessive wires and labels, by drawing a box around it and pressing the [Del] key.
17:47 Drag a box on the remaining 8 wires and labels (there is a difference in dragging the box from left to right, or from right to left) and then press [Ctrl + D] to duplictate the block.

17:49, The block is now attached to your cursor, drag it to it’s end location and place it on the other connector.

17:50. That is the whole schematic. Without taking the screenshots and this typing, it would have taken me less then 5 minutes.

17:51 Footprint assignment. This I have to be a bit careful with, because you have modified footprints.
17:52 PCB Editor / File / Export / Footprints to new Library. Project specific library, and I just accept the default Library.pretty name. KiCad asks: Update footprints on board to refer to new library, answer this question with Yes.

17:55 Go back to the schematic, use one of the many available ways to assign footprints to schematic symbols, and then make sure you select the new footprints from the newly created library.
18:00 Both on the PCB and in the schematic, give U1 as reference for the DIP32, and change the reference for the 32TSSOP to U2.
18:01 Schematic Editor / Tools / Update PCB from Schematic [F8] and make sure the option: Re-link footprints to schematic symbols based on their reference designators is on.

18:04 On the PCB undo the grouping (I had no apetite for figuring out how your grouping works exactly.
18:06 Run DRC. I see three errors left. Two for the corners I already mentioned earlier, and one for overlapping courtyards, and that is intentional, (but KiCad does not know this).

18:07 Zip up and upload the project:
18:14 Fixed a mistake I made in the project.
tsop-dip32_adapter-2024-05-31_181300.zip (23.4 KB)

---

I have left the two clearance violations for you to solve yourself. You will notice a big differnce now, because KiCad will simply refuse to make faulty connections, and always keeps a minimum clearance distance between different nets. (This is configurable See “netclass” topic in the manual) You will also see that all nets now have net names. Some auto generated, and some with the labels given to it in the schematic.

[fukusan]

Wow, thanks for your replies, this is a great help !
I really appreciate the time you spent providing your workflow.

I’ll try to replicate the steps described above and will update this post.

[fukusan]

Allright, I followed your workflow (starting over from scratch for the PCB) and the it was much easier to add and place the tracks indeed.

while they are not symetrical, it should do the job

The DRC now reports only the Courtyard error, so I guess it’s fine now ?

The file is here if you’re willing to take some time to check it :

https://upload.disroot.org/r/DXwL0RMR#paoePJWAEKzSoFYYiqEvqLZE/bGXFhghRN2SEG8BbGU=

Otherwise, I guess this new version is good to go ?

Thanks again for your time and help !

[paulvdh]

So you re-created this in about 45 minutes
Also note that I just re-used all your tracks. I did not change them at all. KiCad put on the new net names (because of the created links between symbols and footprints)

I am not going to put more time into this. Combination of DRC, common sense and a bit of ERC will catch most of the mistakes. One thing you should check is whether the clearances used work with your PCB manufacturer. And of course the basic things. For example this old tutorial below you can check whether you choose the right footprints. With some footprints there can be subtle variants in pitch. For example 0.5mm, 0.65mm. Such differences are small enough to easily overlook, but big enough so your parts don’t fit on your PCB.

[jmk]

@fukusan

I can’t upload files as a new user,

The links in this FAQ explain how this forum operates. You need to self promote to Basic Level to upload files.

[fukusan]

Hi jmk,

Thanks for this information. I can now upload files, and am putting the latest version of the PCB project here in case someone needs it (even though doing it from paulvdh 's instructions would be the way to learn more):

tsop_dip_third-2024-05-31_192842.zip (26.0 KB)

[Piotr]

@fukusan

and added tracks between the relevant pins.

You said no word why you not connected pins 1 to 1. I would expect that if IC is manufactured in 32TSOP and 32DIP then pin numbers would be the same.

[fukusan]

Hi @Piotr,

I take it your are referring to pin 1 of the TSOP package ? It’s connected, but the tracks goes “down” from the solder pad instead of “up” as with the others :

It’s the same for pins 16,17 and 32.

[retiredfeline]

Why not change the pin numbers on the DIP footprint to match the TSOP pins? You’ll end up with a non-standard footprint but you won’t have to make the pin mapping. Or make a non-standard symbol with the remapped pin numbers.

[Piotr]

@fukusan

I take it your are referring to pin 1 of the TSOP package ?

No.
I am referring to connecting all pins “one to one” that means: 1-1, 2-2, 3-3 and so on.
At your pictures I see DIP pin1 connected to some pin near the TSOP one side center but certainly not to TSOP pin1.
I just suppose that if that adapter is to use IC manufactured in TSOP in the PCB having place for that IC in DIP than probably you should have “one to one” connection.
I expected the answer saying that you know what you are doing as this is adapter for specific IC having its chip rotated 90° when assembled in TSOP compared to being assembled in DIP.

[paulvdh]

@retiredfeline

Why not change the pin numbers on the DIP footprint to match the TSOP pins?

That is a possibility, but where is the gain? Drawing the schematic with the “pin mapping” is about the same amount of work as doing the pin mapping, and it has the added disadvantage that it’s easy to forget which may lead to errors.

As for the pin mapping Piotr suggested. Keeping the numbers for both packages the same does have some benefit. I guess this adapter is meant for testing only, probably on a breadboard.

When I make breadboard adapters, I sometimes use a spreadsheet to make labels. I set the cell height to 2.54mm, and then reduce the font so it fits in that height. Then you can easily add text labels or pin numbers and print them out, glue them on top of a PCB, and maybe finish it with transparent tape.

[fukusan]

this is adapter for specific IC having its chip rotated 90° when assembled in TSOP compared to being assembled in DIP.

I guess it is ?

I’m working specifically for SST39SF memory modules (which I should have mentionned earlier I guess, and have edited the title of this post to reflect). That might answer your question too retiredfeline ?

[retiredfeline]

Ah ok, I thought you just needed an adaptor to breadboard with the TSOP and the corresponding PDIP didn’t exist. Obviously they’ve already remapped the pin numbers in the PDIP version, thus “implementing” the second of my suggestions.