Well which one? Every manufacturer for connectors makes them. None of them are guaranteed to be compatible. We currently have a few hundred different terminals in the footprint lib. (The version 4 lib has some for phoenix and some for waago.)
You can’t seriously expect us to have every conceivable part in the lib.
The symbol lib always had symbols for screw terminals in the conn lib (In v5 it will be called Connector)
Are you sure the terminal block you selected is specified for 48A?
Every such connector that i can find would require two pads per connection.
I assume the larger current will flow between the upper row of screw terminals and the copper zone beneath the lower row.
Are you planning to use a wire bridge between the two single pin connectors to bridge that gab? (There are currently two single pin connectors)
If so i would add a few more of them. (I would make one per FET)
Or you might want to move the two traces that currently separate the two zones. (Move them to where the other 4 traces already are.
1.21Gigawatts, where do you get your boards manufactured? Note that I really only need 1 board but that with 3oz copper, at least according to my calculations (if I use 2 sided I can get away with less since I have more area). I am a bit concerned about making my own boards and drilling (looking into Dremel vs Proxxon) as it won’t be very accurate but it makes it easier/cheaper to redo if for instance I got my design wrong. Also most PCB manufacturers seem to require 5+ boards and again I just need 1.
.eelik, I will give v5 a try. I now renamed some nets. I guess it help reducing the risk of making mistakes like when selecting the right net for copper fields. I did indeed use the legacy canvas. I just wanted to have some better control on where the wires go since everything was rather tight but if it helps with re-routing then that’s probably they way to go. I will give this another try next time.
Rene, these are some connectors I bought from ebay. They are rated 30A (per 4 connectors) so about 7.5A/connector. This is for controlling/dimming LED strip lights with each requiring up to 6A. In any case, I took one of the generic screw terminals and then made my own footprint. The upper screw terminals and copper fields are for ground. Each of the negative wires from the LED strips will connect there. There is a single connector directly going to the copper field. That is for the connection to the PSU (I still need to find an appropriate screw terminal). The lower copper field is for the positive supply (again connecting to the PSU with a separate single screw terminal). The lower screw terminals are for connecting the positive wires from the LED strip lights. I agree I probably need to use more than just one screw terminal to connect the PSU to the copper fields. Thanks for the tip. Btw, originally had those two traces between the two copper fields on top where the other 4 traces are but I ran out of space (right now it’s pretty much exactly 10cm which is the size of the PCB I have).
3 oz copper is not very common, either as raw PCB stock or as a product option from PCB fabricators. I’m pleased to hear you did some calculations for trace sizing! (Did you use the calculator that comes with KiCAD, or an online tool?) As you probably learned, there are many factors that affect trace size decisions besides the obvious current-handling requirements. I DO know that heavier copper weights require larger values for both spacing, and minimum trace widths, due to a greater possibility of over- or under-etching the copper.
I have no experience with doing toner-transfer boards at home. The folks in the Homebrew Printed Circuit Boards Yahoo group can probably help you avoid some common mistakes.
It definitely seems wasteful that you have to buy boards in minimum lots of five or ten pieces when you expect to use only one or two. The unused boards end up as shims under the legs of wobbly tables; construction materials for shop-built jigs, fixtures, and enclosures; padding the portfolio you show to the boss when he asks what you’ve been doing at Performance Review time, etc.
As for correcting your mistakes in a follow-on version of the board . . . use ALL of the tools available to you (DRC, Gerber viewers, peer reviews, comparison to other boards, etc) to make sure you don’t make mistakes in the first place. And sometimes you will add a footprint or two, or modify some footprint, to anticipate potential design changes that happen when the physical prototype is tested and evaluated.
2 oz will up the price considerably over 1 oz with most of these.
Rule of thumb, if you want a cheap board is to keep them 100mmX100mm, 1oz copper and double sided. As mentioned above though, 3oz will require greater clearances.
Over a hundred hours and you may be literally ‘back to the drawing board’. Reworking these things continuously is not unheard of and your time hasn’t been wasted. It’s called learning. Considering the amperages you are talking about this thing can fail spectacularly and perhaps dangerously so take your time. A redesign using the V5 release candidate as mentioned above wouldn’t be that painful at this point. If you do, post here as you go along for tips. Best of luck with your board whatever path forward you choose.
I decided to do two copper fields on the back side. The upper one is for GND and the lower one for 12V. Both of these have to support up to 48A if I decide to use all 8 terminals. It appears to me I have to stick with 2oz copper because the tracks from the MOSFETs’ drain to the terminals have to support 6A which according to the KiCad calculator requires 1.8mm tracks with 2oz copper, hence with 1oz copper the tracks would be too wide and touch the other pins on the MOSFET.
My biggest concern right now is to connect my GND and 12V wire to the copper fields. I was going to use just one high amperage connector for each copper field (see red circles). However, Rene’s response made me think that this won’t work. I believe the width of the copper field supports 48A. Let’s assume I can also find a connector that supports 48A (there probably isn’t one but let’s just pretend there is). It seems to me the problem is where the 48A connector and the copper field join. The ‘width’ of the copper field there really is the circumference of the pad that connects the pin. That is obviously much less than the approx… 30mm required for 2oz copper, 10 degree rise and 48A (the calculator actually is only valid up to 35A). Surely the solder will help as it adds thickness but I would need a radius of 7.5mm (30mm=2pir -> r=5mm). So really I would need at least 3-4 connector per copper field. That should work ok for the upper copper field but will be a challenge for the lower one because the connectors have to be on the left side (there are 12 AWG cables coming in from the right side and between the upper and lower row of the 8 connector terminals). In any case, is that thinking correct or am I missing something? Also are there any other concerns with my design?
As for the PCB manufacturing, I found a great post from Alan Wooler on this forum. He lists several sites and his experience with them incl. some pictures. I might give Seed Studio or ITEAD Studio a try. The lead time is long but I am not too concerned with that.
Hemit, I agree it’s not wasted time. I am already getting better at it. I am also almost through with a Udemy course about KiCad by Peter Dalmaris. I think I paid $10 which is pretty good invested money as I learned quite a bit from it. Regarding v5, I tried to download it but it seems there is no build for Windows and I don’t really want to deal with the daily builds.
[quote=“mulu, post:9, topic:9803”]
My biggest concern right now is to connect my GND and 12V wire to the copper fields. I was going to use just one high amperage connector for each copper field (see red circles). However, Rene’s response made me think that this won’t work. [/quote]
It can work, but not with the hole size you indicate.
Much larger cable diameter is needed at 48A, and take care to not rely on plating, especially on wires.
You can get high current connectors, and usually they have multiple pins to spread the connection.
With this much current, some care is needed to watch the total thermal envelope.
Lots of tracks, all trying to raise the PCB 10’ above ambient, can give significant overall heating, and the MOSFETS will add some more to that…
A simple sanity check, is to check a milli-ohms budget :
Let’s start at 1 milli-ohm, which is not very much… 4848.001 = 2.304 Watts See the problem already ?
What are your MOSFETs Rds ?
I’d suggest using fill areas for all current traces, you are buying the copper anyway, instead of etching it away, use it to spread the heat and lower the total milliohms.
You could also look at oval pads on MOSFETS, or even change to surface mount models.
PCB_Wiz, thanks for the input. You said “You can get high current connectors, and usually they have multiple pins to spread the connection.”. I was looking for such connectors but couldn’t find anything. The closest I could find is a terminal block (which I already have) and a Terminal Strip Block Barrier. Something like this
Ah, thermal issue. That’s another good point. I definitely will make the copper fields bigger which should help a little but I still need to look at this more. My MOSFETs are NDP6020P which have a typical Rds(on) of 0.041 Ohm at Vgs=-4.5V and Id=-12A (mine will be no more than 6A per MOSFET). So based on this I am looking at 660.041=1.5W per MOSFET or 12W for all 8 MOSFET at 100% duty cycle.
As for the PCB, if my copper field is 30mm wide and 0.07mm thick (2oz copper) then I get 0.00016 Ohm. So that would be 48480.00016=0.4W. With two copper fields that’s 0.8W. It seems pretty low. Am I making some mistake in my calculation?
Sounds right, but that’s for the wide copper areas, so underlines the importance of widening the other traces the current flows thru.
That 12W total, is quite a lot, - the Id rating of FETS matters less than the system power, and 41mOhms is quite high.
Digikey shows P-FETS down to 3.4mOhms in TO-220 and 1.6mOhms in SMD
Take a look at some of the designs used by the Christmas light folks; they run into this all the time.
I would line up all 8 FETs side-by-side. That way, you can route your high current trace above them on both top and bottom. Feed the trace in the middle; that way, each side only needs to handle 24A rather than 48A if fed from one side. You may want to run multiple input connectors in parallel as running a single 8AWG wire to the board will be a pain.
Once you have the high current side figured out, use the rest of the board for the Arduino, gate resistors, and driver. None of that is critical.
I would use thermals on the pours; otherwise soldering them will be quite tough.
Thank you for the additional input. Originally I had the MOSFETs next to each other but I wanted to keep the board at 10cm x 15cm (because that’s the boards PCBs I bought). Now that I get them produced I am not restricted to 10x15 anymore. Also, I printed my original design and stuck some of the components into the paper printout. It turns out that the double row of connectors were to close to each other (the wire connections are on the inside of these two rows, not the outside). I tried some other configurations but nothing worked well.
So at the end I tried the suggestion from Mike. The new design is as follows:
All 8 MOSFETs in a row.
In the center are two 3 position terminals, one for ground and one for 12V
There is a copper field on the top for ground (front and back)
There is a copper field on the bottom for 12V (front and back)
Connections to the copper field are now thermal relieves. Originally I had them solid to have a more complete connection since there is a lot of current flowing).
There are some images below. One shows just the front layer, one the back layer and one both layers. Any comments are appreciated. I will try to get this into production the next few days.
A couple more questions:
The connection between the front and back layer really is only from the pins of the connectors and solder that manages to get from the back to the front through the holes. Would it make sense to make a few more vias, stick some wire through it and solder it on the front and back? This would allow more current to go from the front to the back (lower the resistance).
I saw some boards that have additional solder. How can this be done in KiCad and will this help for current management (for instance from the MOSFETs drain to the connector).
Adding many vias is certainly a good idea, as you do not want to rely on a single plated hole for thru-path.
Not sure thru-wire is needed, but you could try one board each way.
You can add drawing items on F.Mask, B.Mask layers, but like the via-soldering it is diminishing returns.
Solder has lower conductivity than copper.
Try 2 boards and measure the resistances.
How does the wire enter the 2 central screw connectors ?
Can you find screw connectors with more than one pin ?
A bit lower conductivity, yes. On the other hand, if you can select a thick coating for copper from the manufacturer, it’s much thicker than the copper. And if you use the paste layer, too, and can select to put paste, it will be very much thicker. Not only the electric conductivity is important; it will also work as thermal conductor and cooler.
Thanks for the response. Let me first address your questions. The wires connect to two 3 position terminals that are between the two 8 position terminals. Each position has a pin to the PCB. Here is an image of one of the two 3 position terminals I use.
I selected this terminal because my PSU has 3 GND terminals and 3 12V terminals. So I will run 6 wires (3 GND, 3 12V) from the PSU to the two 3 position terminals. Another reason I selected this terminal is because the footprint is fairly large. I am hoping that this will give more stability as I connect 12 AWG wires to it which can create some significant pull. Also, each 12 AWG cable can carry 20A for a total of 60A which is a lot more than I need (48A in the most extreme case).
I also added 3 vias per power pin. They can be seen in the image below. This image shows the two 3 position terminals and two of the 8 position terminals to the left and right to connect the lights. I set the vias as thermal relieve (drill 0.762mm, drill 1.524) but they show up as solid. Maybe vias don’t have terminal relieve connections.
eelik, I am putting these vias in to connect the front and back of the PCB to allow as much current as possible to flow between the two layers. For that reason, I plan to put a ‘wire’ through the via and solder it on both sides. Thinking about this., vias already connect the front and back so maybe I should just add MANY (like 4-6 per pin) vias with the smallest possible drill hole. Then I don’t have to solder anything. With this approach I don’t have to put a wire through and solder it on both sides.
You can use a footprint with one through-hole pad if you need thermal relieves, otherwise it’s identical to a via when manufactured.
Why “smallest possible drill hole”? Let’s say you have a hole with 0.5mm diameter. The circumference is about 3.14 times that, so it’s almost equal to a 1.6mm track. 0.2mm diameter corresponds to 0.7mm track, which is 0.9mm less, but takes only 0.3mm less space in one direction. So, one 0.5mm hole is much more efficient than 2 0.2mm holes but takes less space. If you add four thermal relieves of 0.2mm they will be 0.8mm together and will be a bottleneck.
If a hole has a good size, it’s easy to solder it through without any wire. But it may require thermal relieves which then are the bottleneck.
Ah, I just posted on the manufacturing page about those vias. For some reason I didn’t see a notification of your post and I figured it’s a somewhat different topic. I tried to delete the post but it seems that’s not possible.
In any case, I look at it from a different way. As you increase the diameter of the hole you increase the ‘track width’ in a linear way (‘track width’ = ~6 * radius). However, you also take surface area away and that increases in a quadratic way (lost area = ~3 * radius * radius).
Having said that, you make a good point about soldering, The hole needs to be wide enough so the solder gets wicked through all the way. What is the ideal size for that?
On the negative side you mention the thermal relieves. Why are they even necessary? Can’t you just leave everything copper and to avoid for the copper to bleed out you expose the copper (none of that green/blue/purple color coating) right around the via. That assumes solder will try to stay close to the exposed copper and not get into areas where there is ‘paint’. Then again, maybe the thermal relieves keep the heat within that small area, i.e. the copper outside the thermal relieve is much cooler, hence the solder does not bleed out.
The minimum depends on the manufacturing quality, I think, and on the tin quality etc. I have a board where all 0.5mm holes can be seen through and take tin, but they may be difficult to solder individually. The upper limit, on the other hand, is so large you don’t have to care. For example normal through-hole component footprint pads are easy to fill.
When you solder with iron the heat dissipates everywhere. It’s difficult to work if there’s large copper area because the actual location and tin don’t take enough heat from the iron. You need a more powerful iron and risk overheating. Thermal reliefs keep the heat in one place, in the pad. Take a thrown away board with large copper area and test.
As you probably can see, the layout changed a lot since my initial design thanks to all your input. If you see any issues with this latest design then please let me know. Some comments:
I added a bunch of 4x4 vias to stitch the front and back
I have quite a lot of bridges (they look like transistors) to create wire connections to increase amperage between copper fields and back/front. I might not use them but at least they are there if needed.
The mounting pads are not in the most ideal position because the biggest strain will be towards the top where all the cables connect to the panel. I guess I could make the PCB 2cm wider and just put mounting pads on all 4 corners.
