And the suggestions keep flowing in! Thanks, that’ll be an easy one to fix.
I am really impressed at the quality and volume of the critique I’ve gotten in just two days. Thank you all for being so willing to share your experience!
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Never heard of this one before (but then I don’t do high volume layouts myself). Can you elaborate a bit?
Traces are covered with solder mask, so the effect could only be uneven heating.
I would have expected tombstoning to be an effect of wrong pad/stencil geometry, one example here Perfect 0402 Footprint — Worthington Assembly Inc.
Not sure how relevant this is though:
If you are in the high volume (1M/year) business, assembly and layout people will know already and your company part library is tuned for high yield.
If you just make runs of 100 PCBAs, I’d say you have other more important issues.
Many of these rules are hold-overs from the early days of SMT manufacturing, but they are still worth following.
I have seen issues with LQFP parts where asymmetrical pads caused the part to be pulled out of alignment. But, these days, having the trace exit the pad in the center and at 90° is more of a style issue.
Putting vias right next to a small resistor or capacitor pad can cause solder starvation, though.
Still an issue with poor designs.
If one padis part of a zone (no thermal relief ) and the other has a single 8th track and IF the part was say an 0603, it’s almost guaranteed to tombstone during reflow
Eg
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