For me the lower example is better as it at once makes a break in bottom GND shorter.
If you go with these tracks under R1,R2,R3 then a break in GND will be even shorter.
You can be right for multi-layer boards, but at two layer 1.6mm board top GND can give return path in 0.2mm distance from track and not in 1.6mm distance making signal loop area few times smaller.
Also:
capacitance to GND works like filtering,
GND area between tracks blocks coupling between them.
In some rare cases additional capacitance is undesirable. For example at operational amplifier output can lead to instability. You should identify such cases when filling GND at top.
Sometimes I left between traces enough space to be filled by top layer GND and I find place to via its ends to bottom GND (extra track connecting two GND vias). You can find 2 such constructions in PCB I linked in post 10 in this thread (first vias North-West of microcontroller and first vias South of it).
Thanks paulvdh. I guess it wasn’t completely clear with all the changes. So is the problem the length of the power traces on the ground plane, and I should just duck them under only where needed? Or is the problem even running the power leads on the ground plane, and I should keep them on top and duck the signal traces?
You are not running power on the ground plane. You break ground plane to run power tracks.
We are just trying to teach you the best practices. Even if it is not too important in case of this PCB.
The problem is having a break in the ground plane. The best would be to have whole bottom layer as GND fill and no other tracks there. I think it should be possible to reach that goal in that PCB case.
If it is not possible than breaks in GND should be as short as possible. I, personally, prefer to use 0R instead breaking GND but this can be considered an exaggeration.
Just one example: Rather quick+dirty, low speed, uncritical STM32G0 display board.
As Piotr wrote, don’t mess with the GND plane. I tried to keep the interruptions short, IMO this is still bearable. There are no islands or antennas and the holes are small enough for my comfort.
Would It be critical, I’d simply go 4 layer. However, with this design it would leave me with three nearly empty planes (signal bottom, mid2 GND, mid1 power +SMT top) - waste of money.
Most of this DIY stuff is rather pedestrian from a signal integrity point of view, so take it easy.
As I write this… the 3.3 V line is really flimsy. I’ll have to fix that
The main drawback of 2L boards is not the missing ground plane. For SMT stuff, just flooding the bottom, routing 90% on top and hopping crossovers to bottom works well enough mostly.
The problem is that there is just no way achieving the equivalent of a proper, low impedance supply plane. Filling the top with VCC does not help on a board like this. Placing power polygons on the GND plane really would mess it up.
There’s more to say in terms of ground plane interruptions and signal integrity, but I guess that’s beyond the point here.
That’s a quite bad example, with hardly any effort to
I mean, 4 long dogbones all jumping over the same track…
It’s obviously just quickly thrown together, but it will work, especially for hobby stuff and when EMC compliance is not such a big issue. There always is some compromise between speed and effort.
It’s just not a good example.
It’s now in the area were there is not much more to improve.
Serpentine tracks may be slightly better then one wire hopping dogbones. Moving the resistors apart may make it a bit easier to fit your tweezers in between. Further benefits will be small.
And as Piotr already wrote, Half the advise given here is also not very important for a PCB as simple as this, but more in a general sense of:
From a manufacturing standpoint, running traces between through-hole connectors is best avoided.
Since those connectors will be wave-soldered, any mis-alignment in the solder mask runs the risk of solder-bridging.
But, 99% of the comments about this design fall into the category of “turd polishing.” At some point you just have to shoot the designer and go to production.
Meh, solder masks have not been misaligned that much for 40 years or so, unless you can find some really atrocious PCB manurefacturer. But both the pad size and soldermask have their own Gerber layers and a clearance between these can be set in the board setup.
Apart from this being a hobby project, and this PCB is not even fit for wave soldering because the THT connectors are mounted from both sides. Some of the youtube video’s about selective soldering look nice though.
Yeah, not only does rotating them save space, the traces are much easier to manage! Thanks for the suggestion.
And Piotr, I remembered I have an extra +3V3 at pin 17.
3Dogs, I’m a software developer. Polishing turds is part of my job description.
OK, then…
One more stylistic suggestion - don’t have traces leave SMT pads at anything but a 90° angle. And, try to leave from the center of the pad. There’s a reason (other than looks) why this should be done - SMT parts are pulled into the correct position by the surface tension of the molten solder. Having traces that are asymmetrical might be enough to pull the part out of position.
It’s called “tombstoning”, and indeed it’s a real thing. Asymmetry in the pad connections can result in a difference in which the pads reach the temperature at which the solder melts, and if the difference is too big, then the molten solder on one pad can pull an SMT part (mostly resistors and capacitors) upright.
