#16

I think you misunderstand the whole post.

There is a problem with how kicad currently handles the soldermask and copper clearances. (They are handled differently at the corners creating the danger of exposed copper from a different net there.)
We know that there will be exposed pcb material. The problem is that the copper zone is exposed at the corner and the reason for this is the explaind wrong handling of the two clearances.

Two solutions to the problem are shown in this screenshot.

• Option 1 (cyan) Use the same center point for the mask rounding as for the copper pad rounding. This would be how the copper clearance is calculated right now.
• Option 2 (red) Use the mask rounding center as the center for the copper clearance as well.

I think option 1 would be the correct solution.

#17

I actually had this conversation with JP sometime back and he convinced me #1 was not the right solution.

The reason is that the clearances have different purposes. The copper-to-copper clearance is for electrical isolation, so the corner of the zone can be radiused so that the clearance distance is kept constant.

The mask-to-pad margin is to allow for registration errors. Since they occur along either the X or Y axis, you cannot round the corner and still have the same error tolerance.

#2, I believe, is still a runner…

#18

If you look from the pad perspective then maybe #1 is not quite right (at least with the explanation by jp.)
I am not so sure about that. A clearance of 0.1 mm does not mean you can have 0.1mm alignment offset in both x and y direction at the same time. IPC defines it as 0.1mm in any direction (For example 0.1mm at an angle of 45° would be the maximum where both x and y direction are misaligned by the same value. This is less than 0.1mm in both x and y direction)

What is certain is that the current way of doing it is definetely wrong. (The two clearances must use the same way of being calculated!)

#19

@Rene_Poschl Please look at my post, my reply was not to you, but was directed towards the OP. It remains my opinion that, in this case with a through hole part, there is no apparent reason to use a positive solder mask clearance for this pad.

I’ve had ~6 different boards fabbed by the purple board source without any issue with the settings that I have used; but have always hand soldered the parts to the boards.

One important thing you have not mentioned is the different zone settings also need to be “set” to the rules that the board house can manufacture.

This image shows that the zone settings can be set with more clearance than the required distance between the nets.

#20

What I did was to change the zone clearance settings beyond normal, and also changed the global mask setting to a negative value.
This is what it looks like in PcbNew:

The mask layer is a “negative layer”; it shows where the Solder Mask will “not” be applied. This effect can be seen in the 3D viewer:

An advantage to the negative mask (Solder Mask Defined pad) is that the Solder Mask layer is a form of epoxy and can help keep the pads from lifting off the base pcb material.

Note: The Solder Mask should probably remain square in every case as this typically gives a visual indicator of the location of pin 1 on the device.

#21

Well… it also comes down to approach…
The Fill area is etched, so you do not really want a sharp corner there, plus that corner exceeds the clearance so it is excessively conservative. That makes a radius logical.

The Mask area is usually simply a flashed larger pad, so until there was a rounded corner pad, making a rounded corner mask would have been hard to do. Which explains the square corners…

Because the mask-allowance is usually rather smaller than the fill clearance, this subtle corner effect is not usually noticed.
Here, we usually set the fill clearance a notch above the PCB quoted rules minimum, otherwise you create a whole-board expanse of minimums, which is tougher on the PCB FAB, than ‘a few traces pushing clearances’.

#22

I’m not sure the strength edge-on of that epoxy ink counts for much… ?
That said, we have used larger copper areas specifically for adhesion/strength reasons, but there it’s the bigger copper that is what’s helping adhesion, not the thin epoxy ink.

#23

By default, KiCad sets a very large mask expansion, which can allow solder shorts to be added during board assembly. See our Stop Mask Expansion page for a more detailed explanation of the problem.

The mask expansion setting can be adjusted under the menu option Dimensions > Mask Pads Clearance, and then setting the Solder Mask Clearance box. We typically recommend a value of 0.002in (0.0508mm), although the optimal value depends slightly on the design itself.

#24

I find it really really strange that Mask clearance defaults to the same value as Copper clearance.

This means, even without a filled zone, that a 45 degree copper trace near an SMD pad will get exposed even without any registration error (mask offset wrt copper). See below.

I’d suggest at the very least to make Mask clearance default to half the Copper clearance. (Or even taking the rounded copper clearance into account, so that the default Mask clearance=Copper clearance/sqrt5 [~0.09mm], allowing the registration error to be equal in both x and y, and also both positive and negative.)

#25

Will not help much if you consider that the mask clearance is there to protect the pad from misalignment of the mask layer. So lets say you expect worst case 0.1mm misalignment and set the mask clearance to 0.1mm for this reason.
Now with your solution you would use 0.2mm copper clearance. One would expect that no matter what direction the misalignment is that way, nearby copper will always be covered. (Yes to ensure it you would need a bit more than 0.2mm copper clearance but lets ignore that for easier calculations)

With the current way of calculating things you will run into trouble even with this solution:

#26

That is why I suggested Copper clearance/sqrt5. This would of course only be adapted to x/y direction misalignment.

Anyhow, I would expect the default to be such that nothing is wrongly exposed in the case of no misalignment.

#27

even 1/sqrt(5) reduction will still yield in free copper at worst case misalignment

#28

Well if that can happen, use Copper clearance/sqrt8, default ~0.07 mm

That is just above the purple recommendation of ~0.05 mm

#29

Goodbye high density boards (The mask clearance is fixed by the fab. So in reality this means that if you are at the minimum there you would unnecessarily need to increase copper clearance just for this bug.)

#30

I do not mean to use a fixed ratio. I am just talking about the default value.

#31

And i explained that no matter what values you choose the bug is still present. Unless you switch to soldermask defined pads (as suggested by @Sprig). But the industry standard is to use non solder mask defined pads as soldermask alignment is not that precise.

Fabs set the suggested clearances with some assumptions in place. In this case they assume that both copper and mask clearances are calculated the same way resulting in a uniform mask to nearby copper clearance.
This is why they do not give an additional mask to nearby copper clearance (That clearance would normally be fully defined by copper to copper clearance plus pad to mask clearance.)
As this assumption is now broken, the user needs to check that this implicit clearance is fulfilled even on the corners of the pads.

#32

Whatever you decide, it should be very difficult to end up at the situation in my first post with default settings. I already had some PCBs wasted from this setting in version 4:

Could you show a warning in DRC?
Could you have some smart auto calculation?

#33

Your foto shows a different problem then you reported here. In that case the mask clearance is much larger than the copper to copper clearance. (The default for zones is much larger than the mask clearance so you must have changed it from the defaults. Meaning even if the defaults are changed you will not be protected in any way from what you did there.)

It also looks like the fab had some quite large misalignment problem (or the angle the foto has been taken at makes it look that way)

#34