Dear Team,
This is the continuation of this question
I finished my first Hierarchical Schematic and RUN my ERC.This time I did not change all pins to passive.
I am getting an error as shown below.May I know how can solve this
The second one is given below.
My power is coming like as shown below.
Can you please help me
According to how I understand ERC (I’m not using it) GND pins of IC should be defined as Power Input and not Power Output.
ERC assumes that two Power Outputs should not be connected. As it is obvious that IC having two GND pins will have them connected together it should be clear (to IC symbol designer) that they can’t be defined as Power Output pins.
I changed the GND pins to passive and the error is gone.
Could you please check the second error I have shown in the image (Power input not driven by power Outputs)
Vin is the power input and this VIn is coming from the connector J1
I don’t use ERC . . . bear that in mind.
Vin is not connected to J1 . . . VIN is connected to EN, C7, C2 and L2 none of those are Power Output
And you didn’t do as suggested in the other thread . . .
Please read: KiCad ERC - manual
It tells you this:
and this . . .
