Error in the symbol pins for the PN2222A component.

As the title says, pins 1 and 3 are wrong, changed.
As can be seen in the following pdf https://www.onsemi.com/pub/Collateral/P2N2222A-D.PDF.
I am using: Application: kicad Version: 5.1.0-rc1-unknown-3b97961 ~ 76 ~ ubuntu18.04.1

please report this as an issue over at the github repo. https://github.com/KiCad/kicad-symbols

FYI, I haven’t checked the symbol, but be aware that P2N2222 and PN2222 have a different pinout https://en.wikipedia.org/wiki/2N2222#/media/File:2N2222,_PN2222,_and_P2N2222_BJT_Pinout.jpg

There are also transistors where a suffix behind the part number changes the pinout.
SOT-23 is also a total mess. It seems that manufactures can not even reach consensus where pin 1 is located on that package, and not much luck for KiCad to change that.
https://duckduckgo.com/html?q=sot-23+pin+numbering
https://www.electronicspoint.com/forums/threads/sot23-pin-numbering.43746/
> What is the current convention with respect to pin numbers on SOT23?
> I have seen:
> Zetex
> 1
> =====
> 3 2
> Then OnSemi 3
> =====
> 1 2
> And Infineon (also in an older Siemens data book)
> 3
> =====
> 2 1
> Somehow that looks like an invitation to a huge mess. What gives?

This is where we need to have a pin map field for symbol to customize it - instead of create a new one.

See this discussion IPC vs manufacturer:

I find the link “SOT23-3 Pin out: IPC or Datasheet?” not very usefull.
Most of the answers there seem to be from people oblivious to the mess around SOT23.

One of the answers also stated “rotatation does not matter because the package is non symmetrical and the manufacturer will figure it out”.

Ah well, after they made new stencils and/or scrapped a few batches of your product they will probably figure it out eventually, but in these days of automated manufacturing the correctness of the data you give to the manufacturer becomes important to do things right the first time so no rework or adjustments are needed.

Just recently there was a post here about a wrong offset for a part in the 3D viewer and the OP there had a tendency to “correct” this by shifting the (correct) (0, 0) location of the 3D part to made the part appear on the right location on the 3D viewer.
https://forum.kicad.info/t/sot-23-3d-component-offset-from-pads-solved/15252

The SOT23 I’l always remember. A very old PCB package I used a long time ago called “ultiboard” wrote a few pages about it in their manual. It might even have been a paper manual from the dark ages before Internet.
They solved the problem for them by abolishing the use of pin numbers for SOT23-3.
Instead they decided to use pin names: c,b,e or g,d,s for transistors, etc.
Trouble with this approach is there are already 12 combinations for a single SOT23 footprint, and this also does not cover dual diodes and other things in SOT23.

I disagree that the manufacturer datasheet should win, especially for transistors. As the user really cares about bce, not 123, the pin numbering should follow IPC

In real life, I’ve been the design engineer for many many boards. We used an outside design service for all our boards designs.

The folks I worked with the most would create a new footprint for every component on our board. I always though it was a overly conservative approach, but the results were always correct.

Fast forward to the first board where I was the CAD designer. It was just last month and I used Kicad.
Of course my SOT-23 part was “upside down” And the NodeMCU library I downloaded from somewhere on the internet was too wide.

Both of the errors were my fault. After staring at the screen so long during the design I convinced myself the board was correct and I skipped the step where I would print out the gerbers, check each footprint and any mechanical parts needed. This step had been especially important when we used custom board mounted.transformers.

So the moral of my story is to create a project library (or at least a personal library) where you’ve vetted the layout & pinout for each part. And ALWAYS check the gerbers with the part datasheet in hand.

I also remember chuckling to myself when I would read posts of folks looking to collect footprints from anywhere and everywhere, realizing that was a recipe for failure. Now the jokes on me as I kind of did the same thing.

Just recently there was a post here about a wrong offset for a part in the 3D viewer and the OP there had a tendency to “correct” this by shifting the (correct) (0, 0) location of the 3D part to made the part appear on the right location on the 3D viewer.
https://forum.kicad.info/t/sot-23-3d-component-offset-from-pads-solved/15252

The above referenced post was from me. In learning Kicad I thought the insertion point should be on pad 1 and not the center of the component. This seemed logical to me because when inserted into a design, pad1 would always be on grid. This of course screwed up the 3D placement as it relies on the center of the part for reference.

I’m still struggling with grid size mm / inches. I would love to stay with mm but the majority of parts are still in inches. I know this is manageable, however I’ve not yet developed the grid discipline to handle this well.

John

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In 2017-06 I made a little tutorial about test fitting parts.


It’s a simple print pcb on paper, punch holes and insert THT.
Especially with RJ-45 connectors, there can be many footprint variants.

In industry a lot of quite strong Green separatable screw connectors are used.
I don’t know their name, but you can order them with a pitch of 5mm or with a pitch of 5.08mm. With connectors > 6 holes the Male does not fit the Female if they have the wrong pitch, or they won’t fit your PCB. The difference is so small you have no chance of seeing it without trying or carefull measurement.
image

We all have this experience once in life. Moreover in the case we have two different SOT-23-3 parts in the same design with datasheet pins 123 and 132.

I do both things: I keep my personal libraries and create project specific libraries for each project. The project libraries contains all the symbols-footprints-3Dmodels of the project and no more.

It used to be right for Through-hole components. For SMD components the anchor is usually its center.

Not neccessary true for SMD components. Anyway, the grid vanishes in the gerber files.

Sure you will learn to read 0.635, 1.27, 2.54 or 5.08 in a natural way…

The idea that pads need to be on some sort of grid stems from a time when pcb design tools only snaped to grid. KiCad snaps to the pad center so there really is no need to use the grid for anything else then getting the board kind of nice looking.

The only things where i really use the grid are mounting holes and edge cuts as i want these features to be on nice metric numbers (relative to each other) such that i can easily tell the mechanical engineers how they should create the housing. Maybe the placement of other components might also fall under the same rule for you (A connector that protrudes through the housing might be another example.)


The footprint center point is at the center of the body for automatic assembly.

Grids are also usefull for lining up multiple connectors. For example to make modules fit on perfboard. They almost got that right by arduino.
A grid also makes it easier to work with arrays and block.
For example in the old fashioned Eprom array “tutorial” I just posted in:
https://forum.kicad.info/t/replicating-layout-features-manually-with-arrays-blocks-tutorial/15332

Heck. It would be neigh impossible to connect a wire to a symbol in Eeschema. (Snap to pin is probably on some roadmap).

While drawing footprints a grid can be handy, but with the Footprint Wizards and pad arrays it does not matter much anymore.
While drawing the PCB itself, Some kind of grid makes for easy alignment of rows of resistors / capacitors and such, but there are so many different (SMD) components with different pitches that grids are useless during routing.
While routing I always trust on the Interactive router to follow the design rules. By setting the design rules (track widht and clearance) you can put more traces on a PCB than with aligning them on some grid. (Unless the grid is an exact match with your design rules.

The story that I heard was for the first production run that they were giving out at a conference the board was right. But there was a last minute change and the designer shifted one of the headers over temporarily while they worked on an adjacent part of the board. Then forgot to shift it back and the boards went out for fabrication. The error was discovered before the conference but they didn’t have time to respin any new boards. Then they didn’t want to break any shield designs that recipients of the boards at the conference would design based on their physical model. Once the error is out in the wild it can be painful (and potentially devastating to a new design that an entire ecosystem is to be built upon) to correct the error, so the error becomes a feature.

I just got kick in the face to use the package naming from datasheet! I should had check the drawing in datasheet with the package I use instead of take the package name straight! I should go back to the state never trust anything until I can prove it myself!

You can trust, but always confirm. :wink:

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In real life, I’ve been the design engineer for many many boards. We used an outside design service for all our boards designs.

The folks I worked with the most would create a new footprint for every component on our board. I always though it was a overly conservative approach, but the results were always correct.

Yes. For a hobby, it is ok and maybe even necessary to use the bundled library. For ones own ‘real life’ boards, or boards you have some professional responsibility for, you at least need to check each and every library. Better to maintain your own library, your own designs or collected over time. And whatever you do, never ever update libraries without checking the result as a whole from scratch (and my rule is a library change is just a new design or revision, requiring justification).

Wrong pinouts are just one issue. Safety standards (e.g. clearances) and manufacturability are perhaps larger drivers.

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