It’s somewhere between “extremely difficult” and “impossible” for ERC to second-guess your design intent. If the schematic finds no connection between some node pair, then it assumes you didn’t intend for them to be connected. In the case you show here, the shape of the symbol (and the sparseness of the circuit) gives additional information that some human observers might interpret as meaning, “Oh, it looks like he intended to have a connection here.”. I’d speculate that a software program which could correctly evaluate the situation you showed, would also have the ability to lay out the board without human intervention.
I think that ERC might be able to spot a pin end cross overlaying a net wire without a junction as being an error. There is no reason I can think of where it would be intended
Yes, that’s a special case where the shape of the symbol provides enough additional information to identify a drafting error. In general, it’s less certain.
The case of wires almost-but-not-quite connecting to a pin (or another wire segment) seems to happen more often in KiCAD than in other EDA tools I’ve used. Rather than putting significant effort into improving ERC to catch these errors, I’d prefer to have drawing functions with an improved snap-to-object capability.
I used to be plagued with these same problems on Orcad long ago
Any pin has a connector cross when not attached to a wire. No pin cross should be allowed to be within, say, 10mil of a net wire segment that it is not connected to. This applies equally well to an IC, R or C symbol
It seems its not be that’s having this problem, Like others have said, you would think that a symbol that’s touching another wire should be a classed as a warning at least. But in ERC setup, there is no way to select a check for this event.
It seems strange, because a part with an unconnected pin will be flagged. The power symbols act more like net labels, an “orphan” label will not be flagged as unconnected.
Detecting lines crossing connection points which are unconnected is quite easy to do, there is no reason why that could not be added.
I must admit, if the ERC confirms there are no problems I believe it !
So it would be great if it could do the above, then I could fully trust ERC as at the moment I have to zoom in on every connection and see if its connected. Depends how many you have, you just may miss one and then your PCB will not work !
While I agree that any unconnected pin, wire, label, power port, or power flag that is not marked as unconnected should cause an error. However DRC also performs electrical checks and one would expect other errors should have been detected in this case. I think the ops example above represents a misuse of the power flag. DRC checks that all pins designated as “Power Inputs” are driven by a net that also contains a pin designated as a “Power Output” or a power flag. The use of Power flags should be kept to a minimum and are usually attached to a power “source” that is not otherwise designated as a “power output”. An example would be a pin of a connector that supplies power, or a passive component such as an inductor in a power filter. I believe if the op had used power flags differently then errors would have arisen.
I am the one that started this topic, can anyone show me how I could use the power flags differently, as I thought I was using them correctly ?
The 3 power flags as shown are the only ones on the schematic, I then use multiple +3V3 and GND throughout my schematic as shown above. The above is just a simple example in reality there are about 12 of each on my real schematic.
If anyone could help so that DRC would pick up the error, that would be great.
By connecting the power flag directly to the power port symbol all matching power ports are now connected to that power flag making them all power “sources” even if none of them actually connect to the actual power source, satisfying DRC. Instead connect the power flag to the actual power source. If pin 3 of P8 is intended to supply power to the circuit then place the power flag directly on or as close as possible to that pin. Same goes for gnd and 5V.
Edit: Power flags are only required on nets that connect to “power input” pins but have no “power output” pins. For example, the output pin of a voltage regulator should already be designated as a “power output” pin and therefore it’s net does not need a power flag. However, if that net were to connect to a fuse or other passive component, then the net that connects to the other pin of that component would need a power flag.
Power flags are not global, nor are they anything like a label. They are nothing more than a pin with their “Electrical type” set to “Power Out”. They allow flagging a net as being driven by a power source. You could accomplish the same thing by editing any pin on the net and setting it’s electrical type to “Power Out”. That however, is usually not a good idea unless the pin is indeed a power source.