EMI and EMC optimization

[Piotr]

@Dave1

Please advise reading materials on PCB layout

I hope links I provided long time ago are still valid:

Decoupling capacitor via placement

I didn’t read that book but I suppose you can replace it with: I think it is enough for most pcb designers.

Decoupling capacitor via placement

About 2004 I found an interesting serie of EMC articles by Keith Armstrong (for many years I didn’t know if Keith is a woman or men name). Later they became no accessible, but when I tried to find them few years ago I found them once more: http://www.compliance-club.com/pdf/DesignTechniquesPart1.pdf http://www.compliance-club.com/pdf/DesignTechniquesPart2.pdf http://www.compliance-club.com/pdf/DesignTechniquesPart3.pdf http://www.compliance-club.com/pdf/DesignTechniquesPart4.pdf http://www…

@Dave1

MCU core is not high speed

For such 2 layer PCB the most important in my opinion is to have continuous GND at one side:
You can see such designed PCB here:

Approaching PCB track routing for a newbie

Positioning for me is the main work in designing PCB. If each element is where it is needed than routing is simple. Till now all my PCBs are 2 layers and all of them have GND plane taking 100% of bottom layer. So except GND I design my PCBs as 1 layer. I use microcontrollers in QFP packages without thermal pad at bottom. This allows me to go with VCC under the microcontroller and go out through all corners and all VCC pins. That way GND and VCC don’t disturb my signal connections. At all digi…

All vias you see are GND. I used there may be 3 0Rs to jump with VCC over signal lines without making a break in GND. As at each output line I use 47..100 ohm resistors (to limit current pulses taken by IC to change output state and I power practically each IC through ferryte bead in most cases I need not to add 0Rs to cross wires.