How to design a simple full adder in kicad nightly builds 5.I am not able to correctly get waveform for any digital circuit.Can anyone post a digital circuit which works in Kicad nightly builds
Have you thought about learning how to do it yourself? It would be much more useful in the long run, whether you are doing coursework, professional work, or DIY.
You won’t be able to rely on other’s doing your work for you for your whole life.
I have tried to do it myself I am not able to get the right results.
I tried simulating a half adder circuit but I am getting this error can you tell me how to fix this error
For digital simulation, KiCad is not the right tool.
I recommend Logisim http://www.cburch.com/logisim/
Yesterday it was a flip-flop, did you ever get that to work?
I’m no expert in spice simulation, but my understanding is it is primarily an analog simulation. I know, one can argue that everything is analog but there are some tools for digital analysis that just don’t exist in analog simulation. That being said, the spice integration in KiCad is a very new addition and not many of us have any experience with using/playing with it. Also, I really don’t know how much of the library have spice models integrated. Our librarians are all volunteers.
At first brush, I think you have problems with your schematic. You appear to be wanting to use 3 gates of 2 chips, yet you have 4 chips referenced (U1, U2, U3, and U4). Your XOR on U1 looks good (first gate is U1A and the power block as U1E, all makes sense). But your NAND is split across 3 references. U2 and U4 aren’t being powered. U3 is being powered, but none of its gates are being used. Try consolidating all down to U2 by leaving U2A as is, change U4A to U2B, and change U3E to U2E.
I’m looking at the fatal error “vu4 is a shorted VSRC”. I really don’t know what that means, but it seems to indicate a voltage for U4 is causing problems with Voltage Source. (Or I could be way wrong…) Maybe fixing your ref’ds would clear that issue.
Also, note all the warnings “Unable to find definition of model - default assumed”. This spice integration is new, maybe the default has problems? I think you really need to find a Spice Wizard. I think there are a couple here, but I don’t know if they are monitoring this thread.
Also, please remember that this forum is a community forum. We are all just users trying to help each other out.
I’m not inclined to someones coursework, but the question piques my interest and provides an opportunity to learn something useful. I am building a clock from relays, and in order to create and verify the design before committing to copper I used logisim. I am pleased that the 7 segment decoder worked first time. I also wrote my own simple digital simulator to simulate a 4 bit binary counter, which can read a KiCad schematic and simulate relays and logic gates. That was really useful, and I only needed a couple of wires to fix bugs in the design (parts I had not fully simulated).
Anyway, as mentioned pspice needs models before it can simulate, and AFAIK only parts in pspice.lib can be used out of the box, there are models for “simple” parts such as resistors, transistors, switches. For the logic gates in 74xx.lib or cmos.lib you will need to find or create suitable models.
All gates can be created used pspice basic models, and these can be easily found on the we. E.g. from Wikipedia, a NOT gate:
That should be simple enough to create in KiCad pspice version. Exercise left to reader.
A complete digital clock using only relays? (And 7-segment displays of course)
And a lot of diodes…so not entirely purist. I’m also lacking an “authentic” electro-mechanical oscillator and display section, so really it’s just digital counter/decoder so far. The circuit is inspired by Simon Winder’s flip flop design : http://simonwinder.com/projects/relay-calculating-engine/
So far I have prototyped a single 4 bit counter and display. The counter has a configurable reset from 1-15, so I will use the same board for 6 digits HHMMSS. It needs an external pulse per second clock, and some simple logic to reset at 11:59:59
Obviously using relays is daft, but I got a reel of 900 from a dumpster! I’m calling it an “art project”
Watch out for a repetition of the original computer bug. Maybe moth balls, or a cedar enclosure would help avoid bugs.
Interesting flip flop design, now I see why the diodes, and that square root calculator is fascinating. I could watch it calculate root 2 for hours. And I like that old rotary phone dialer as an input device.
A relay version of an astable multivibrator?
I don’t know if I would call it daft, impractical maybe but then, as you say, it’s a form of art. I think there is sometimes more satisfaction from building such projects. Building a clock with a processor or even discrete logic doesn’t seem like such a big deal, it’s expected to work. But something like a clock or calculator from relays is just fascinating that it works at all.
Edit: And your clock might even end up having a “tic-toc” like sound.
Edit2: I think Ben Eater’s microprocessor is just as daft and impractical but still an interesting project and quite educational. Not sure if it is as “artistic” though. I was going to build a more capable version of it but on a PCB.(I just don’t have the patience anymore to wire something like that up on breadboard)
We have to look at the error messages of ngspice:
Error on line 7: U1 ip1 ip2 ... 74hc86 Unable to find definition ...
The gate U1 is translated by Eeschema into the ngspice input line shown above. This is simply wrong. A ngspice line beginning with U is the definition of a ‘Uniform Distributed RC line’, for shure something the author did not intend.
... Error on line 11: vu2 ip1 ip2 ... 7400 ...
Here Eeschema has decided to tranlate the gate u2 into a voltage source beginning the line with v.
One reason might be that ngspice-27 does not allow ‘-’ in node names. This has changed with the recent ngspice-28.
Gates, opamps, and other circuits added by including libraries have their contents as subcircuits. These require an x at the beginning of the instance line, e.g. XU1 … in ngspice.
A first action might be to rename U::: into X…
Another might be to avoid the ‘-’ in all net names.
In the examples coming with eeschema, e.g. laser_driver, the opamp is also named by U1. So there has to be another method for name translation inside of Eeschema.
Finally the KiCad maintainers should switch to ngspice-28 as soon as possible.
Unfortunately I am not firm using KiCad, so cannot be of much further help.
I had hoped to show a more complex example, but I struggled to get even a single MOSFET working. Anyway, here is a NOT gate:
and here is the simulation:
- Simple components (R, C) are handled ok.
- Diodes need to have pins swapped to work correctly.
- There are BJT and MOSFET devices in pspice.lib, but these don’t work out of the box (model not found).
- V1 shows as sine generator on the schematic, but in fact it generates a pulse. The settings in Edit Spice Model override, the value field.
- I downloaded the model for the MOSFET from http://www.st.com/en/power-transistors/stn2nf10.html. It is implemented as a subcircuit.
- There are lots of PSPICE and other variants of models around, but these may not be compatible with ngspice.
- Overall, there are many “automagic” stuff going which is really hard to guess, and there are some pitfalls I haven’t mentioned.
If you are familiar with ngspice or pspice, then the KiCad simulator is easy enough to guess how to use. If you are not familiar with simulations such as pspice, ngspice, then it’s a pretty steep learning curve.
Paul ,thank you very much for the nand gate.Could you send a picture of the schematic and the librariries you have used to design the nand gate.Also can you tell me how to design d flip flop in Kicad nightly builds .
I dropped this in 3 minutes. just to post a “draft”
DIGITAL LOGIC in spice is very tricky.
There are already ALL LIBS you need defined
The whole 74xxx logic indeed as well as CMOS counterparts
If you download LTSPICE you should have some good models
for TTL logic gates and a bit more stuff to start yours…
To use these models is FAR BEYOND a simple explanation here
once you have to mention “BEHAVIORAL” models in spice3
Mixed models are even more tricky
e.g you CAN NOT DEFINE an analog clock altogether a digital one
The digital clock is entirely BEHAVIORAL.
This simple draft is WITHOUT the BEHAVIORAL models
once KiCAD is not ready for such elaborated models
Analog gates can be defined just like this one
put that into a SUBCKT and you are almost ready
My simple draft looks just like so… just for fun
And BTW ALL FLIP-FLOPS are defined already
as BEHAVIORAL models in SPICE3F - CODMODEL “digital”
Nobody needs to reinvent the wheel…
ONE more bit…
If you carefully inspect this 3 minute draft …
You will see that the “symbols” don’t matter
As long as the proper spice directive is OK you may use other symbols
This is a much better implementation
I have fixed the symbols to match the models
(I have a script which roughly converts a spice into a 10mil grid kicad.sch )
This is far better and accurate start.
This is more proper than the other 3 minute …
indeed in took 10 minutes to do all that
The latest corrected draft was built using
a SPICE input with all gates defined
That draft RUN should look like so…
You should be able to achieve that … with some tweaking
FYI 10 minutes after this…
I decided to GLUE all gates into a GENERIC SPICE GATE LIB
The result is a simple GATE DRIVEN SPICE library and model
with just that very same MOSFET based CMOS gates.
3 gates are required to derive all others.
Library already done - called that dspice.lib