# Differential pair into PCB calculator

Hi,

I tried to use the tool “PCB calculator” to determine the size of mi USB tracks.
In tab “TransLine” i chose “Coupled Microstrip Line” and i can calculate the impedance of only one track.
But it lacks the differential impedance (impedance between these two tracks).

Why this information is not present ?

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The differential characteristic impedance is `2xZodd`

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I tried with “Saturn PCB” and on web site “mantaro.com” it gives the same result but with kicad if i made “2xZodd” i don’t get the same result ?
The difference vary to 1ohm to 10ohms…
Normally “Zdiff” is different to “2xZodd”

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You’ll find that different tools and calculators will give slightly different results depending on the underlying computation technique. If the dimensions are critical, I wouldn’t trust anything less than a 2D field solver, or alternatively you could ask your fab house to give you the stackup document with controlled impedances called out. What is your target impedance, and what are your PCB dimensions? (Distance from signal later to gnd plane, dielectric material, copper thicknesses, etc)

Both mantaro or Saturn’s approximations provide a limited range of applicability 0.1 < S/H < 3.0. These are common approximations originally provided by MSTRIP (http://www.dtic.mil/dtic/tr/fulltext/u2/a117364.pdf). The IPC provides a list of signal integrity calculators that follow IPC-D-317 (http://www.ipc.org/ContentPage.aspx?pageid=Signal-Integrity-Vendor-List).

In the IPC list, you’ll find Rogers has an online calculator at (https://www.globalcommhost.com/rogers/acs/techsupporthub/en/mwi_calc2017.php).

This calculator matches the Kicad result rather closely, which itself draws from the paper “Accurate Wide-Range Design Equations for the Frequency-Dependent Characteristic of Parallel Coupled Microstrip Lines
(http://ieeexplore.ieee.org/abstract/document/1132616/)

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For mi application i use an USB 2.0 bus with a 90ohms Zdiff target (45ohms per line Zodd).
I work with a 4 layers PCB, the thickness of copper is 0.018mm (18um), the high between the GND is 0.4mm, the PCB material is standard FR4 with gold. So the length of my tracks not exceed 50mm.

In accord with Saturn i choose S=0.15mm(space) and W=0.4mm(track size)

So Seth_H If Zdiff is just 2xZodd why this does not appear in a box ?
In this state it’s very confusing…

The calculator I usually use is here.

Your single ended impedance target of 45 ohms is unrealistic. Two traces with 45 ohms single ended impedance will have a differential impedance of 90 ohms only when they are separated by enough distance to not have any coupling. Differential traces are intended to be coupled and therefore spaced as close as possible and since coupling reduces the differential impedance your single line impedance will need to be greater than 45 ohms (Zd < 2 x Zo). Therefore, for a Zd of 90 ohms a Zo target of 50 ohms is much more realistic.

Your dielectric thickness (from trace to ground plane) seems a bit high, are you sure about that? And you are using 1/2 oz. copper? Using your specs. above I calculate a trace width of 29 mils (0.737 mm) and a separation of 25 mils (0.635 mm).

As well as impedance you need match trace lengths and keep the traces as parallel as possible.

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The traces don’t necessarily need to be spaced as close as possible - there are trade-offs between tight and loose coupling. (See this PDF, slide 30 for the trade-offs: http://bethesignal.com/wp/wp-content/uploads/2014/01/PPT-326_practical_diff_pair_design.pdf)

As for the dimensions you give, I actually think you’re almost dead on… I achieved the following results using MMTL:

``````Characteristic Impedance (Ohms):
For Signal Line ::RectCond1R1= 64.8876
For Signal Line ::RectCond1R0= 64.911

Characteristic Impedance Odd/Even (Ohms):
odd= 46.8086
even= 87.4759
``````

I’ve attached the file I used in case you’d like to mess with it. Make sure to account for soldermask as that will adjust your final values by 3 or 4%.

Sorry for my late reply…

From your post Gigawatts i recheck my stack up layer and you are right ! the high between two layer is 0.18mm not 0.4mm and yes i use 1/2oz copper.
Values are more realistic with this.

So i the real question is how i can use the kicad calculator ?

As close as possible as determined by any other design or manufacturing constraints.

As there are in almost all aspects of electronic design, it’s important to know when and how they apply. If you continue to read that document you posted you will notice their guidelines on slide 32. Namely …

If bit rate is < ~ 1 Gbps
Always consider tight coupling

This thread is discussing USB 2.

Yes, solder mask can lower the single line impedance by 1 - 2 ohms and the differential impedance by 3 - 4 ohms for thin traces. As the trace gets thicker solder mask has less affect. Since the op is using 1/2 oz copper this should be taken into account.

That looks more reasonable. Your width and spacing now looks like it should be more like 12 mils (0.31 mm) width and 12 mils (0.31 mm) spacing.

To be honest, I avoid it. It’s just not as straight forward to use as others that are available, especially when it comes to differential pairs. Try using the one I posted above.

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I found approximately the same value than you with other calculator.
Shame it does not work with kicad…
Really thank at all !

It does work with KiCad’s transmission line calculator, and it’s not as bad as I probably make it seem. I just don’t like it, the way it is laid out irritates me. You will get a slightly different result than with other online calculators. Most online impedance calculators use simplified equations that make a few assumptions and therefore their results are only valid for a given trace width to dielectric height ratio. The one I posted earlier states that it is valid for a w/h ratio from 0.1 to 3.0, which is usually good enough.

I should mention that I made a mistake in an earlier post. When I told you that your Zodd target of 45 was unrealistic, I was obviously mistaken. For some reason I was thinking you were setting a target of 45 for Zo which is a common mistake. But after reading the post again I realize that you were indeed correct, sorry about that.

Here’s a quick explanation just in case I have managed to confuse you, or anyone else reading this.

Zo is the impedance of a single trace on it’s own without any coupling.
Zodd is the impedance of a single trace of a coupled pair when driven differentially, that is equal amplitude but opposite polarity.
Zeven is the impedance of a single trace of a coupled pair when driven in common mode, that is equal amplitude of the same polarity.
Zdiff is the impedance between the two traces of a differential pair which equals 2 x Zodd
Zcom is the impedance between the two traces of a common mode pair which equals Zeven / 2

Edit: You may have noticed that the mantaro calculators give a slightly different result of 12 mil and 12 mil.

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For common PCB materials, is the dielectric constant reasonably consistent and well controlled? I know there are specialized materials where dielectric constant is closely controlled but what is the uncertainty for using whatever flavor of “FR-4” your fabricator chooses to use?

And, is the proximity of other materials (e.g., enclosure walls, cables and wiring) likely to have a significant influence? A couple years ago I played with a PCB-trace antenna design (approx 1 GHz) in the free version of Sonnet, and concluded that spending more than a few minutes on “optimization” was not worth the effort if you didn’t have accurate information about all the other stuff within a few inches of the board.

Dale

No, it is not well controlled or consistent. It varies depending on manufacturer and even from lot to lot from the same manufacturer. Having said that, the change in trace impedance is proportional to the square root of Er. The Er of FR-4 supposedly varies from about 4.2 to about 4.7. In the above example that would equate to an impedance variation of ~2.3 ohms. KiCad defaults to a Er of 4.5 for FR-4. Some online calculators default to 4.2 while others default to 4.7.

In terms of impedance yes, the proximity of other materials will influence the impedance but they usually need to be very close to the board surface, within 50 mils or so on the trace side of a microstrip. For high frequency signals (>5 GHz) it would be worth considering using stripline.

In terms of traces that intentionally radiate or receive radiation things get more complicated than for calculating trace impedance. But FR-4 should still be suitable below 3-5 GHz if you can tolerate a few db of loss.

Edit: For completeness, and the benefit of other readers, I thought I would also mention the following.

If not told otherwise your fab may choose to use less expensive prepreg when building your stackup. Types of prepregs are identified by numbers like 1080, 2113, 2116, 1652, 7268, etc. These prepregs not only vary in thickness but also in the weave of the glass fiber which causes the ratio of fiber to epoxy to vary which in turn causes the Er to vary. But some of the fiber fabrics are woven more tightly than others which can also cause variations in the Er across the board. This can be an issue with higher frequencies as not only can there be impedance discontinuities along a trace but one trace of a differential pair might see a different impedance than the other etc.

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Thanks for the information, and for giving us the benefits from your experience. It sounds like quibbling over differences from various calculators - even as much as several percent - is pointless in comparison to the uncertainties resulting from the variations of parameters in the real-world.

Dale

I’ll pitch in with my experience, which isn’t much, but I know I was looking for any information whatsoever a while ago:

I’ve had good results with Mantaro’s calculators. At least two times the results from their differential pair calculator matched closely what I got in the real world (as measured), or at least close enough for me (my pairs were 100Ω and 90Ω, and only the 100Ω ones were important, I got ±2% measurements on those).

As others have said, you do need a PCB manufacturer with a consistent and documented stackup. FR4 dielectric coefficient will vary, but it isn’t significant enough in most use cases.

–Jan (PartsBox.io)

Fortunately, unless you are making RF test equipment, even 20% impedance error often is acceptable

I suppose that depends on your definition of “acceptable”. It may still work with that kind of error and if that’s all you care about then that may well be acceptable. The USB 2 spec., for example, specifies an impedance tolerance of +/-15%. This applies to the entire signal path not just your board. With a larger impedance deviation you might find that your board works better with some cables than it does with others, or even not at all with some cables.

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I agree, the differences between calculators is not worth worrying much about. The only way to recommend one over another would be by comparing measured results and they are usually not consistent enough to be conclusive. My advise would simply be to use your preferred calculator until you determine that it’s not accurate enough.

Making an attempt at impedance control is usually better than having no control at all. And even with minimal effort it’s not hard to get close. Communicate with your fab to determine your prepreg options, ie. thickness, Er, cost, etc. Define your stackup and layout your board using your preferred calculator.

In most cases, such as USB 2, Ethernet, etc. I would not specify “impedance control” when placing a PCB order. As you know specifying impedance control results in additional engineering charges as well as per board costs. And usually excludes you from taking advantage of any special offers or discounts. Of course in situations that require tighter impedance control it makes sense to pay the additional charges and enlist the help of the fab. When you specify impedance control the fab will check the geometries of your impedance controlled traces and, if not told otherwise, will make any changes necessary if possible. I prefer them to notify me of any required changes so that I get the chance to rerun DRC and recheck trace lengths after the changes have been made. Once the geometries are sufficient according to their calculator they then add coupons next to your board. These coupons, usually one per board on the same panel, contain traces that will be used for measuring the resulting impedances after the boards have been manufactured. These traces may be of the same geometries as the impedance controlled traces on your board or other standard geometries the fab might use. You can usually request a copy of these test results.

Keep in mind that other aspects of the layout such as parallelism, symmetry, length matching, etc. are all just as important as impedance control but your fab will not be concerned with checking any of these.

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