Differential pair into PCB calculator


Which is a case by case decision and Er variation is just only one parameter, tolerance in etched trace width can lead to much greater spread, especially for a high impedance line.
Reading a bit about USB3, you get 85R traces, 90R cable and the I find this article aiming for 100R

USB3 is 10x faster than USB2, so a lot more critical


I won’t deny that it gets confusing. The USB3.1 standard makes no mention of 85 Ω impedance, all three differential pairs have a differential impedance of 90 Ω. I believe the tolerance for USB3 is +/-5 ohms.

The standard also states The eye diagrams are to be measured into 50-Ω single-ended loads. which is why the document you posted was using 100Ω differential pair.


I found a TI pdf stating 15% for USB3.0
The loss and crosstalk seem to be more critical than the impedance


That’s not true at all. Controlling impedance is one way to control losses since impedance mismatches result in losses. The crosstalk usually discussed in reference to differential pairs is the crosstalk caused by adjacent pairs/channels. The crosstalk within a differential pair manifests as loss, the tighter the coupling the greater the loss. This is one reason why with high speed signals you would use looser coupling. Dielectric loss for a given impedance and frequency remain fixed for a given substrate material. Conductor loss is a function of trace width and length. Looser coupling allows for wider traces reducing conductor losses. An increase in substrate thickness also allows for wider traces again lowering conductor losses. And of course, shorter traces also reduce conductor loss. All while maintaining the desired characteristic impedance.

There is no perfect solution only trade-offs. Wider traces and spacing consume board real-estate. Looser coupling increases sensitivity to crosstalk from adjacent signals as does an increase in substrate thickness as it increases the distance to your reference plane.