Custom Rules: How to place a condition String over multiple Lines?

Let say there is this custom rule:

(version 1)

(rule "GndViaRule"
  (constraint hole_size (min 0.175mm) (max 0.175mm))
  ( condition 
    "A.Type == 'Via' && A.Via_Type == 'Micro' && A.NetName == 'someName.MOSI' && A.Layer_Top  == 'In1.Cu' && A.Layer_Bottom == 'In2.Cu' "
  )
)

To avoid long lines, can it be converted to something like this?

(version 1)

(rule "GndViaRule"
  (constraint hole_size (min 0.175mm) (max 0.175mm))
  ( condition  "    A.Type         == 'Via' "
               " && A.Via_Type     == 'Micro' "
               " && A.NetName      == 'someName.MOSI' "
               " && A.Layer_Top    == 'In1.Cu' "
               " && A.Layer_Bottom == 'In2.Cu' "
  )
)

This doesn’t work. I also tried :

(version 1)

(rule "GndViaRule"
  (constraint hole_size (min 0.175mm) (max 0.175mm))
  ( condition  "    A.Type         == 'Via' "           \
               " && A.Via_Type     == 'Micro' "         \
               " && A.NetName      == 'someName.MOSI' " \
               " && A.Layer_Top    == 'In1.Cu' "        \
               " && A.Layer_Bottom == 'In2.Cu' "
  )
)

and

(version 1)

(rule "GndViaRule"
  (constraint hole_size (min 0.175mm) (max 0.175mm))
  ( condition  "  A.Type         == 'Via'           \
               && A.Via_Type     == 'Micro'         \
               && A.NetName      == 'someName.MOSI' \
               && A.Layer_Top    == 'In1.Cu'        \
               && A.Layer_Bottom == 'In2.Cu'        \
               "
  )
)

The syntax of all this 3 snippets doesn’t work. Any idea how to split this line?

A.Type here is redundant. Apart from that, you can try

( condition  "    A.Type         == 'Via' ")
( condition  "    A.Via_Type     == 'Micro' ")

At least in my test two conditions are ANDed. This doesn’t help with long OR sequences, though.

A.Type here is redundant. Apart from that, you can try

That was just an example. I copied from the thread Using the A.fromTo('', '') in a custom rule for a micro-via (maybe someone should say that @ravn ? ).

At least in my test two conditions are ANDed. This doesn’t help with long OR sequences, though.

Well, this could already help a lot. Maybe you can create multiple rules for long Or-sequences?

1 Like

There’s an issue on GitLab somewhere that you could up-vote.

(Warning: feature freeze for 8.0 was yesterday. So even with a bunch of up-votes you’re looking at 9.0.)

The multiple Conditions way is currently good enough for me.

It looks like it is not the same thing to place conditions on multiple lines and to && them @eelik. The two rules below trigger on different vias in my project:

(rule "L1 -> L5 burries via hole size"
	(constraint hole_size (min 0.2mm) (max 0.2mm))
	(condition "A.Type == 'Via' && A.Via_Type == 'Blind/buried' && A.existsOnLayer('L1.Cu') && A.existsOnLayer('L2.Cu') && A.existsOnLayer('L3.Cu') && A.existsOnLayer('L4.Cu') && A.existsOnLayer('L5.Cu') && !A.existsOnLayer('L6.Cu')")
)
(rule "L1 -> L5 burries via hole size"
	(constraint hole_size (min 0.2mm) (max 0.2mm))
 	(condition "A.Type == 'Via'")
 	(condition "A.Via_Type == 'Blind/buried'")
	(condition "A.existsOnLayer('L1.Cu')")
	(condition "A.existsOnLayer('L2.Cu')")
	(condition "A.existsOnLayer('L3.Cu')")
	(condition "A.existsOnLayer('L4.Cu')")
	(condition "A.existsOnLayer('L5.Cu')")
	(condition "!A.existsOnLayer('L6.Cu')")
)

@JeffYoung , if you want to look into this, the attached PCB-file contains the code that illustrate the issue.
rule-dev.zip (13.8 KB)

Same here (but i have a somewhat outdated 7.99 version).

The oneliner reports more errors. The diff of the report files:

2c2
< ** Created on 2023-10-03 14:50:30 **
---
> ** Created on 2023-10-03 14:51:06 **
4c4
< ** Found 143 DRC violations **
---
> ** Found 133 DRC violations **
314,325d313
< [microvia_drill_out_of_range]: Micro via drill out of range (rule L1 -> L5 burries via hole size min width 0.2000 mm; actual 0.1750 mm)
<     Rule: L1 -> L5 burries via hole size; Severity: error
<     @(84.0850 mm, 72.7020 mm): Micro Via [Net-(B1-In)] on L1.Cu - L2.Cu
< [microvia_drill_out_of_range]: Micro via drill out of range (rule L1 -> L5 burries via hole size min width 0.2000 mm; actual 0.1750 mm)
<     Rule: L1 -> L5 burries via hole size; Severity: error
<     @(87.4850 mm, 72.7020 mm): Micro Via [Net-(B1-In)] on L1.Cu - L2.Cu
< [microvia_drill_out_of_range]: Micro via drill out of range (rule L1 -> L5 burries via hole size min width 0.2000 mm; actual 0.1750 mm)
<     Rule: L1 -> L5 burries via hole size; Severity: error
<     @(86.9800 mm, 72.6958 mm): Micro Via [Net-(B1-In)] on L2.Cu - L3.Cu
< [microvia_drill_out_of_range]: Micro via drill out of range (rule L1 -> L5 burries via hole size min width 0.2000 mm; actual 0.1750 mm)
<     Rule: L1 -> L5 burries via hole size; Severity: error
<     @(84.3850 mm, 72.7020 mm): Micro Via [Net-(B1-In)] on L2.Cu - L3.Cu
329,346d316
< [microvia_drill_out_of_range]: Micro via drill out of range (rule L1 -> L5 burries via hole size min width 0.2000 mm; actual 0.1760 mm)
<     Rule: L1 -> L5 burries via hole size; Severity: error
<     @(108.4400 mm, 69.5700 mm): Micro Via [GND] on L1.Cu - L2.Cu
< [microvia_drill_out_of_range]: Micro via drill out of range (rule L1 -> L5 burries via hole size min width 0.2000 mm; actual 0.1750 mm)
<     Rule: L1 -> L5 burries via hole size; Severity: error
<     @(108.4800 mm, 70.3600 mm): Micro Via [GND] on L1.Cu - L2.Cu
< [microvia_drill_out_of_range]: Micro via drill out of range (rule L1 -> L5 burries via hole size min width 0.2000 mm; actual 0.1750 mm)
<     Rule: L1 -> L5 burries via hole size; Severity: error
<     @(109.1500 mm, 103.2000 mm): Micro Via [Net-(B7-In)] on L1.Cu - L2.Cu
< [microvia_drill_out_of_range]: Micro via drill out of range (rule L1 -> L5 burries via hole size min width 0.2000 mm; actual 0.1750 mm)
<     Rule: L1 -> L5 burries via hole size; Severity: error
<     @(115.6500 mm, 103.2000 mm): Micro Via [Net-(B7-In)] on L1.Cu - L2.Cu
< [microvia_drill_out_of_range]: Micro via drill out of range (rule L1 -> L5 burries via hole size min width 0.2000 mm; actual 0.1750 mm)
<     Rule: L1 -> L5 burries via hole size; Severity: error
<     @(115.2000 mm, 103.2000 mm): Micro Via [Net-(B7-In)] on L2.Cu - L3.Cu
< [microvia_drill_out_of_range]: Micro via drill out of range (rule L1 -> L5 burries via hole size min width 0.2000 mm; actual 0.1750 mm)
<     Rule: L1 -> L5 burries via hole size; Severity: error
<     @(109.6000 mm, 103.2000 mm): Micro Via [Net-(B7-In)] on L2.Cu - L3.Cu

Yeah, sorry, there are several other errors in that file by design. I am working on a design kit with rules for a new stack-up I am developing, and want to catch several errors, so adding them on purpose in that file. However, if you change between the two different version of the rule, you will find out that the results are different.

But actually, restarting KiCAD seem to change the behavior. After a restart, I can used multi-line conditions. However, I changed nothing in the rules, except commenting the milti-line vs. single line construction before restart, and then it did not work. So, don’t know… Seems hard to try to track down.

Anyways, now it seem to work. Thanks for the assistance!

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