Hello guys. Bypass capacitors are always required to be placed as close as possible to the parts. For this demand, I always use capacitors small package, so the capacitors could stay closer. But it could be quite challenge for the solder person, if I use packages like 0402 (beacuse they are too small). Then what if I put part of the capacitors on the backside ? So maybe I could make the PCB equally compact but with larger components ? And if yes, how can I put the capacitors and other parts on the backside?
Thank you very much 
First, there is not much benefit of going smaller then 0603, unless the whole PCB is densely populated. 0603 is still relatively easy to solder, and also easily handled by P&P equipment, while going smaller then that it gets progressively more difficult.
Second, putting decoupling capacitors close to ICâs is mandatory, but it is not that important that a few millimeters would matter much. For stuff made with older lithography processes (most uCâs, generic ICâs) it is also far less critical than with more âmodernâ high-speed logic such as DDR3 (&4) FPGAâs and big microprocessors.
But if you want, putting footprints on the backside of the PCB is easy. Just select some footprints, or even hover over them and press f to flip the selection or footprint to the other side of the PCB. Having footprints on both sides of the PCB does have a penalty though, because it increases assembly costs. Once you decided to put footprints on both sides of the PCB, there is no real benefit of only putting the decoupling capacitors on the back. When flipping parts from one side to the other, they also often get moved off -grid. Itâs no use of first do accurate positioning on the front, and then flipping them to the back. Put footprints first on the side you want them, and only then do the final / accurate placement.
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If submitting for PCBA, SMD on both sides will cost you (much?) more because they have to prevent devices on one side falling out when the other side is soldered. Thatâs why the basic PCBA offering of fab houses is for SMD on one side only.
Placing parts on both sides is not uncommon, but usually requires use of the âAdhesiveâ layers, which is an additional step for the assembly facility and increased cost.
Bypassing with small capacitors as close as possible to the IC is a good idea. Recently I have been working with an LTC3311S which IC seems to be particularly picky about good bypassing technique. And to get that chip working correctly their recommended design uses two bypass capacitors which are 0201s. 0603 is adequate for many ICs but I would not assume that 0603 is always small enough for all ICs.
This one is probably a âposter childâ for needing small bypass capacitors. I gather from my colleagues that the IC is very prone to misbehavior if bypassing is not done really really really well.
from: https://www.analog.com/media/en/technical-documentation/user-guides/dc3018a-ug.pdf
My hands have never been very steady but I can routinely manage 0603s. 0603 is the default chip size in my lab for resistors and small capacitors. I use bigger when needed. I have difficulty with 0402 and smaller. It seems that a lot of other people feel similarly.
Regarding capacitors on the other side of the board, that unfortunately needs vias which contribute stray inductance. So I would usually try to put the smallest closest bypass capacitor (maybe an 0603) on the same side of the board as the IC. If more capacitance is desired, I might put an 0805 or 1206 on the other side to leave room for other components. As for any electrolytic capacitors, those are usually taller so would be on the top side but can be further away.
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Another way to save space is to tombstone all of your chip capacitors. But this is more difficult, especially when you solder the fine wire from the upper component terminal down to the board. 
In my opinion production efficiencies are more important/valuable than any prototyping convenience. For this reason I would always try to put all SMD on the top side if possible. As far as package size goes, dont worry about small packages being hard to handle - PCB fab plants deal with them every day. I find 0402âs OK to hand solder if required, luckily its not too often for me as they are quite fiddly. Like I said, inconvenience for me is largely irrelevant.
As a matter of interest there is also a penalty with using vias - theyâre not as âgoodâ as tracks on the same side. Try to avoid them with decouplers and other high-frequency critical parts.
Lastly (just to contradict myself) Iâve designed quite a few PCBs with SMDs on both sides with no complaints from anyone. Dont forget fiducials on any side there are SMDs.
For 15 years I was designing PCBs with SMD and I didnât know what fiducial is and was never asked to place them at PCB. When, few years ago, we moved our production to second contract manufacturer he asked for fiducials and I learned what it is.
I suppose that this first one simply placed fiducials at panel out of my PCBs.
That also tells me that probably they not always have to be used at PCB.
Fiducials allow the SMD placement robot to align itself with the PCB. As such theyâre more important with finer pitch devices. If none are present I believe they can use component pads. Iâm also certain they add fiducials to the snap-offs when panelising - am looking at a panel now there is a fiducial in each corner near the panel locating pin hole.
Regardless itâs good practice to put them on the board, even if they dont get used. They dont cost anything.
Hand soldering small, 0402 or smaller, is hard, but PCB and assembly houses like JLCPCB have no problems with them.
Guess a lot depends on if it s a high speed design, using solid/good ground planes and/or it applies to analog or digital circuits. Google: System Design Guidelines for the TM4C129x Family page 20. A question is when using viaâs if it makes a difference if the cap is on the top or bottom side when the board has symmetrical ground planes. I did read in some datasheets that placing then on the opposite side is better if you can get closer to the VDD/GND pin with a via.(canât find the reference though)
I googled per your suggestion and I see a bunch of documents towards the top of the results. Best if you could provide a link.
If I can see the layout I MAY be able to provide an educated opinion as to what may be better. A via is not the same as many vias, and where are they located relative to the pins in question. If you happen to have the +Vin and GND pins adjacent to each other, then it is easy to see that a small capacitor right between the two would probably be most effective. In other situations it is not so obvious.
hope this helps. https://www.ti.com/lit/an/spma056/spma056.pdf?ts=1695875099665
Intersting also is AP24026 EMC and System-ESD Design Guidelines for Board layout
Thanks. That link âgot me thereâ. I wish that more applications information would get into the layout discussion as well as this one does. I do not know what is the pin pitch on the microcontroller but I imagine it is in the order of 0.4 or 0.5 mm so that A or C may be difficult without very small capacitors and microvias:
Note for other readers that this drawing shows 6 acceptable methods + two unacceptable; I am not showing them all.
I WAS going to say this in italics but have changed my mind:
I am not sure I agree with option B, but if you were to start there and move the capacitor to the bottom of the board, that ought to be better owing to having only two vias in the path between the capacitor and the device pins rather than four. I withdraw that observation for a board with 4 or more layers because a ground plane is probably on L2 and need not connect down to the bottom of the board.
With typically 0.2 mm dielectric thickness between a ground plane and top layer, the ground vias shown in B and C may contribute much less L than 1.6 mm long vias connecting between top and bottom sides of the board. I do think (per the Infineon app note; I like that one also) that if you can double or triple the number of vias that might be helpful, but vias (unless they are blind or buried) take board space on all layers.
My preference would be to have a small bypass cap on the top side which is connected directly to the Vcc pin, and maybe have 2-3 vias connecting the capacitor ground and IC ground pins each to an L2 ground plane, unless you can connect the capacitor and IC both directly on the top side with a very short connection. (note: I am on about my 4th tweak/edit of this post.)
Iâve learned it different. Go from the vias to the cap and then from the cap to the IC. So C) shows how NOT to do it! The vias should be above the cap. Even A) is only second best. Again, the vias should be above the cap.
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Do you have any sources to back this up? There are so many opinions out there.
Agree 100% (since I know what they are 
).
To not forget it my default âemptyâ project (I use as start for new designs) contains 3 fiducials at schematic.
Except space.
With one small PCB I had to agree with manufacturer that I am putting only one fiducial as simply donât have more room. He said that he will use fiducials from neighboring PCBs in panel.
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Vias at this drawing looks being very small. If IC is 0.4mm or 0.5mm raster then what is their external diameter. I certainly not use such small vias. Mine typical minimum is 0.6/0.3 (recently I used 0.5/0.25).
At 2 layer PCBs I use connection like C) but without VDD via (with VDD I go under IC and connect to VDD pins on all 4 IC sides from there).
I think that as short as possible connection to capacitor is the most important factor so in method A) I donât like vias between pads and capacitor making this distance bigger (I assume bigger vias than at this drawing). If VDD/GND layer pair would be with high capacitance between them (very close and ferrodielectric between them), then connecting pads to that layer pair first (like in A) ) is justified, I think.
I also think that way, but it is valid until you donât have VCC/GND layer pair that you can use as the better high frequency capacitor then capacitor you assemble at PCB. We donât know with what assumptions this drawing was done.
Not all PCB assemblers make use of fiducials. It is also quite common to use machine vision to look at the actual pads and analyze their locations.
Computational speed and image recognition has improved a lot over the last 20 or so years, because features on PCBâs have become smaller, local distortions on the PCB itself have become more important. Due to the high heat and pressure during laminating, PCBâs (especially multi layer) will distort a little bit during manufacturing, and this made local fiducials close to high density parts mandatory. But assigning room for all those local fiducials was a nuisance, and thus the analysis of pad locations became common. But if you have room for them, it never hurts to add them.
First, to make installing the bypass capacitor on the backside one needs to have through hold ICâs. And SMD device on the front with the bypass on the backside would require two vias in series with the backside. I donât believe this would be a good idea.
Below is a graph of the relative high frequency performance of different size SMD capacitors. Unfortunately the Y axis is not identified (it is a log function). It would seem to suggest the smaller the capacitor the better the HF performance. HOWEVER this is a near ideal measurement with a stripling fixture so the capacitor has essentially Zero lead/path length.
In reality the required path (just to reach the IC pins) will more than add enough inductance that the difference between capacitor sizes does not substantially effect bypass performance.