Changing evaluation level of hierarchal sheets

Hey all,

I am trying to use hierarchal sheets for subcircuits and I have spice parameter lists (.PARAM) inside them. Whenever I try to run a simulation though the parameters from these sheets are put at the bottom of the netlist, after the control statement. Is there any way to tell KiCAD to prioritize these hierarchal sheets (which are below the level of main schematic) so that their parameter lists are read in sooner, or read in with the .SUBCKT text on the main schematic?


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Unfortunately your description is not detailed enough to understand your problem.

Why is it a problem that the .param statements are at the bottom of the netlist?

What are the KiCad and the ngspice versions you are using?

The best would be if you provide and upload a small, but complete example project which demonstrates the problem. The ngspice netlist may be a starting point.

The KiCad/ngspice interface offers only limited configuration options, but there may be other ngspice-specific workarounds, if your problem has become clear.

Apologies for the lack of description, attached is the main schematic and the subcircuit. There are two problems, one is the area passed to the subcircuit does not register, and two the parameters inside the subcircuit are not registered before the simulation (it looks like). Below is the netlist, where all the .PARAM after the .trans are from my subcircuit. I would like to somehow get the Parameters inside the SUBCKT section while still calling them from the the hierarchical sheet,

.title KiCad schematic
.include “/home/amorphyxar/Documents/Amorphyx/TransistorSwitchSimulation (copy)/2N2222.LIB”
V1 Vin GND DC 0 PULSE ({VsL} {VsH} {2t_delay} {t_rise} {t_fall} {t_prog-(2t_delay)-t_rise-t_fall} {t_frame})
Q1 /Vc /Vb GND 2N2222
R1 Vin /Vb 1k
V2 Vcc GND 5
R2 Vcc /Vc {(5.76e-6/area)(res2exp(num)*volt) +res3)}
.save @v1[i]
.save @q1[ib]
.save @q1[ic]
.save @q1[ie]
.save @r1[i]
.save @v2[i]
.save @r2[i]
.save V(/Vb)
.save V(/Vc)
.save V(Vcc)
.save V(Vin)
.SUBCKT resistor_sub area=1.0
.PARAM t_rise=1e-4
.PARAM t_fall=t_rise
.PARAM t_delay=1e-5
.PARAM t_frame=90e-5
.PARAM refresh_rate=60
.PARAM Num_rows=8
.PARAM t_prog=(1/refresh_rate)/Num_rows
.tran 5e-06 0.0003 0
.PARAM volt=5
.PARAM num=0.7
.PARAM res=5E4
.PARAM res2=2E4
.PARAM res3=12

I am running ngspice-31 with KiCAD 5.1.9 on Ubuntu. Let me know if you need more detailed information.
Example2.sch (3.2 KB) resistor_sub2.sch (689 Bytes)

At a first glance at the netlist: a subcircuit containing only parameters does nothing, because there is no circuit inside. Parameters don’t create a circuit, you will need device instances.

A subcircuit will be invoked by an instance line starting with X in ngspice. This will be achieved by attaching a subcircuit model to a symbol in Eeschema. There is no such instance line in your netlist, so the subcircuit in the netlist will be discarded by ngspice.

Putting all parameters into a subcircuit tells the simulator that these parameters are local to the subcircuit. Any circuit outside of the subcircuit thus will not benefit from the parameters.

You should explain what is your intention. What part of the circuit to be on the main sheet? What part of the circuit is to be on the subsheet?

Hah, you’re right. Am I wrong to use hierarchical sheets for subcircuits? I am editing the previous netlist, as the .PARAMs inside the .SUBCKT do not actually appear - I entered those from the main sheet which I do not want. The new netlist will now match the screenshots and attached schematics.

I have some larger circuits I am trying to build, but I want to work my way through using KiCAD with simpler circuits first since I am new to KiCAD. Currently my subcircuit contains just a resistor with a parameter list to determine its resistance. I use hierarchical labels to connect it into the main circuit which is a BJT (from an included library) using the subcircuit resistor and an equation based voltage source. The parameters in the subcircuit are intended to be local. The resistor R2 (shown in netlist) is actually the one from the subcircuit (in a different sheet).

Below is my main circuit followed by the subcircuit.


In the text box you have defined a .subckt which has no connections, followed immediately by .ends, thus being empty. Unfortunately there is no automatic connection between such a definition and a subsheet.

Who told you that this feature is available?

I am not aware of any means that allows you to get a circuit from a subsheet into an ngspice .subckt.

No one specifically said it would work with ngspice simulations, but I thought I had saw people using subsheets as subcircuits for PCB and schematics so I figured that was the common method. I am not sure the extent of the KiCAD and ngspice interface. Is there any way to include subcircuits automatically (by using something other than sheets), or do I need to generate netlists for individual circuits and then place them all as text in the main schematic? I was previously using Qucs-S and it has subcircuit functionality so I was hoping KiCAD would have something similar.

I do see that the netlist pulled the R2 resistor in and correctly aligned it with Vcc and Vc, where it should be. If subsheets are automatically pulled in and connected with their labels, could I just keep all .PARAMs on the main schematic and let it run from there?

Subsheet circuits are automatically added to the ngspice netlist. There is no need for subcircuits here. All .PARAM on the main sheet is o.k… It should also be ok to place them onto the subsheet, as they will be loaded into the netlist as well. But they are not local to the subsheet, so you have to take care to provide unique names.

What will happen if you place the subsheet circuit at two or more places on the main sheet? Probably you will have to re-annotate everything, to avoid naming conflicts.

You may define whatever subcircuit (see ngspice manual chapt. 2.5) and put it into a file (e.g. mycirc.lib). The circuit inside of .subckt … .ends may be created manually, or by another Eeschema project. The .subckt interface Nodes, paramaters) has to be done manually anyhow. Then you have to define an Eeschema symbol, that has the same number of pins (interconnects) as the subcircuit, and place it onto the main sheet. Then attach the subcircuit to the symbol.

Parameters may be sent into the subcircuit by calling them from the Spice Model Editor window via the Model line (see example attached), which is also visible in the Eeschema window.

The fixed numbers for calling the subcircuit may be replaced by parameters like
RPOT value={valparm} ratio={ratparm}
and somewhere else
.param valparm=6k ratioparm=0.25

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That helps a lot. So if I want to create a subcircuit, I can:

  1. Create a Eeschema schematic of the circuit
  2. Print the netlist of the circuit and convert it to a subcircuit netlist specific to ngspice then save as a .lib
  3. Create a symbol library, make a new symbol, and place the symbol on main schematic
  4. Go into the Spice model editor from the symbol properties and attach the new .lib file as the model
  5. Verify the defined pin connections specified in the subcircuit library are correct with the symbol’s pins

Or I can use subsheets and rename the components inside if I use multiple copies.

Let me know if those are incorrect; otherwise, I will give it a go and comment back here once I get it working.

Yes, both should be possible.

Better you start with two small test projects, adding 1 or 2 subsheets, or 1 or 2 subcircuits in the other. Only if this is working, you may start a larger project.

I am trying to attach a library to a symbol to use as a subcircuit, but for some reason the netlist only connects one port to the symbol. Here’s the subcircuit that I am trying to connect:

.SUBCKT resistor_sub2 In Out
R2 In Out {(5.76e-6/area)(res2exp(num)*volt) +res3}
.PARAM volt=5
.PARAM num=0.7
.PARAM res=5E4
.PARAM res2=2E4
.PARAM res3=12
.PARAM area = 1

Where In and Out are the labels where the ports would connect out. Here is how it shows up in the main schematic netlist:
XRT1 /Vc resistor_sub2
Sometimes it pulls /Vc and sometimes /Vcc, not sure why it changes. The symbol has one input port and one output port, but I also tried two inputs and two outputs with not change.

Here is how it is connected in the schematic:

Any idea how to get it to read in correctly? Is it a subcircuit or symbol error?

I figured out, at least in part, the issue. I did not number the nodes in my symbol, instead leaving just the names. Once I went back and gave them numbers it pulled in the correct connections. Not sure if this deals with the Eeschema parser trimming nodes or not.

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I have tested several circuits with various subcircuits and have been successful in running them using the symbol+spice model method. This method is easier in my opinion for models that will be reused in a circuit. Not sure how to change it, but this topic is now SOLVED. Thanks for the help.

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